AT90USB162 Atmel Corporation, AT90USB162 Datasheet - Page 230

• Manufacturer Part Number: AT90USB162
• Manufacturer: Atmel Corporation

Specifications of AT90USB162

• Flash (kbytes): 16 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 22
• Ext Interrupts: 21
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

23.5.3
230
AT90USB82/162
External Hardware conditions
is programmed, the Reset Vector will always point to the Boot Loader Reset and the fuse can
only be changed through the serial or parallel programming interface.
Table 23-4.
Note:
The Hardware Boot Enable Fuse (HWBE) can be programmed (See
special hardware conditions under reset, the bootloader execution is forced after reset.
Table 23-5.
Note:
When the HWBE fuse is enable the
pled during reset rising edge. When
will be set as the Boot Loader Reset address and the Boot Loader will be executed (See Figures
23-3).
BOOTRST
HWBE
1
0
1
0
1. “1” means unprogrammed, “0” means programmed
1. “1” means unprogrammed, “0” means programmed
Boot Reset Fuse
Hardware Boot Enable Fuse
Reset Address
Reset Vector = Application Reset (address 0x0000)
Reset Vector = Boot Loader Reset (see
Reset Address
PD7/HWB pin can not be used to force Boot Loader execution after reset
PD7/HWB pin is used during reset to force bootloader execution after reset
(1)
PD7
PD7
/HWB pin is ‘0’ during reset rising edge, the reset vector
/HWB pin is configured as input during reset and sam-
(1)
Table 23-8 on page
Table
239)
23-5) so that upon
7707F–AVR–11/10