AT90USB162 Atmel Corporation, AT90USB162 Datasheet - Page 257

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AT90USB162

Manufacturer Part Number
AT90USB162
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT90USB162

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
22
Ext Interrupts
21
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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25.7
25.8
7707F–AVR–11/10
Serial Downloading
Serial Programming Pin Mapping
Table 25-13. Parallel Programming Characteristics, V
Notes:
Both the Flash and EEPROM memory arrays can be programmed using a serial programming
bus while RESET is pulled to GND. The serial programming interface consists of pins SCK, PDI
(input) and PDO (output). After RESET is set low, the Programming Enable instruction needs to
be executed first before program/erase operations can be executed. NOTE, in
page
dedicated for the internal Serial Peripheral Interface - SPI.
Table 25-14. Pin Mapping Serial Programming
Figure 25-10. Serial Programming and Verify
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
XLWL
XLPH
PLXH
BVPH
PHPL
PLBX
WLBX
PLWL
BVWL
WLWH
WLRL
WLRH
WLRH_CE
XLOL
BVDV
OLDV
OHDZ
257, the pin mapping for serial programming is listed. Not all packages use the SPI pins
1. t
2. t
Symbol
PDO
SCK
PDI
commands.
WLRH
WLRH_CE
Parameter
XTAL1 Low to WR Low
XTAL1 Low to PAGEL high
PAGEL low to XTAL1 high
BS1 Valid before PAGEL High
PAGEL Pulse Width High
BS1 Hold after PAGEL Low
BS2/1 Hold after WR Low
PAGEL Low to WR Low
BS2/1 Valid to WR Low
WR Pulse Width Low
WR Low to RDY/BSY Low
WR Low to RDY/BSY High
WR Low to RDY/BSY High for Chip Erase
XTAL1 Low to OE Low
BS1 Valid to DATA valid
OE Low to DATA Valid
OE High to DATA Tri-stated
is valid for the Write Flash, Write EEPROM, Write Fuse bits and Write Lock bits
is valid for the Chip Erase command.
Pins
PB2
PB3
PB1
(1)
(1)
(2)
CC
I/O
= 5V ± 10% (Continued)
O
I
I
AT90USB82/162
Min
150
150
150
3.7
7.5
67
67
67
67
67
0
0
0
0
0
Typ
Serial Data out
Serial Data in
Description
Serial Clock
Table 25-14 on
Max
250
250
250
4.5
1
9
Units
ms
ms
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
257

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