ATmega1280 Atmel Corporation, ATmega1280 Datasheet - Page 339

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ATmega1280

Manufacturer Part Number
ATmega1280
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega1280

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
86
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
1
Uart
4
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
16
Input Capture Channels
4
Pwm Channels
15
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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30.6.1
2549N–AVR–05/11
Signal Names
In this section, some pins of the ATmega640/1280/1281/2560/2561 are referenced by signal
names describing their functionality during parallel programming, see
9. Pins not described in the following table are referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.
The bit coding is shown in
When pulsing WR or OE, the command loaded determines the action executed. The different
commands are shown in
Figure 30-1. Parallel Programming
Note:
Table 30-9.
Programming Mode
Signal Name in
RDY/BSY
1. Unused Pins should be left floating.
PAGEL
DATA
BS1
XA0
XA1
BS2
WR
OE
Pin Name Mapping
Table 30-13 on page
RDY/BSY
Pin Name
Table 30-12 on page
PAGEL
PB7-0
+12V
PD1
PD2
PD3
PD4
PD5
PD6
PD7
BS1
XA0
XA1
BS2
PA0
WR
OE
ATmega640/1280/1281/2560/2561
(1)
I/O
I/O
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RESET
XTAL1
GND
O
PA0
I
I
I
I
I
I
I
Program Memory and EEPROM data Page Load
Bi-directional Data bus (Output when OE is low)
Function
0: Device is busy programming, 1: Device is ready for
new command
Output Enable (Active low)
Write Pulse (Active low)
Byte Select 1
XTAL Action Bit 0
XTAL Action Bit 1
Byte Select 2
340.
340.
PB7 - PB0
AVCC
VCC
+5V
+5V
DATA
Figure 30-1
and
Table 30-
339

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