ATmega128RZAV Atmel Corporation, ATmega128RZAV Datasheet - Page 347
ATmega128RZAV
Manufacturer Part Number
ATmega128RZAV
Description
Manufacturer
Atmel Corporation
Specifications of ATmega128RZAV
Flash (kbytes)
128 Kbytes
Max. Operating Frequency
16 MHz
Max I/o Pins
54
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
6
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
0.25
Antenna Diversity
No
External Pa Control
No
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
16.0
Transmit Current Consumption (ma)
17.0
Link Budget (dbm)
104
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30.7.13
30.7.14
30.7.15
2549N–AVR–05/11
Reading the Signature Bytes
Reading the Calibration Byte
Parallel Programming Characteristics
Figure 30-6. Mapping Between BS1, BS2 and the Fuse and Lock Bits During Read
The algorithm for reading the Signature bytes is as follows (refer to
page 341
1. A: Load Command “0000 1000”.
2. B: Load Address Low Byte (0x00 - 0x02).
3. Set OE to “0”, and BS to “0”. The selected Signature byte can now be read at DATA.
4. Set OE to “1”.
The algorithm for reading the Calibration byte is as follows (refer to
page 341
1. A: Load Command “0000 1000”.
2. B: Load Address Low Byte, 0x00.
3. Set OE to “0”, and BS1 to “1”. The Calibration byte can now be read at DATA.
4. Set OE to “1”.
Figure 30-7. Parallel Programming Timing, Including some General Timing Requirements
(DATA, XA0/1, BS1, BS2)
for details on Command and Address loading):
for details on Command and Address loading):
Data & Contol
RDY/BSY
Extended Fuse Byte
PAGEL
Fuse Low Byte
XTAL1
Fuse High Byte
WR
Lock Bits
t
t
BVPH
DVXH
ATmega640/1280/1281/2560/2561
BS2
BS2
t
t
XHXL
PHPL
0
1
0
1
t
t
t
t
XLDX
PLBX
XLWL
PLWL
t
BVWL
BS1
t
WLWH
WLRL
0
1
“Programming the Flash” on
“Programming the Flash” on
DATA
t
WLBX
t
WLRH
347
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