ATmega16M1 Atmel Corporation, ATmega16M1 Datasheet - Page 37
ATmega16M1
Manufacturer Part Number
ATmega16M1
Description
Manufacturer
Atmel Corporation
Specifications of ATmega16M1
Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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9. Power Management and Sleep Modes
9.1
9.2
Table 9-1.
9.3
8209D–AVR–11/10
Sleep Mode
Idle
ADC Noise
Reduction
Power-down
Standby
Overview
Sleep Modes
Idle Mode
(1)
Active Clock Domains and Wake-up Sources in the Different Sleep Modes
Active Clock Domains
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
Figure 8-1 on page 27
and their distribution. The figure is helpful in selecting an appropriate sleep mode.
shows the different sleep modes and their wake-up sources.
Notes:
To enter any of the five sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select
which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, or Standby) will be
activated by the SLEEP instruction. See
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the register file and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
When the SM2:0 bits are written to 000, the SLEEP instruction makes the MCU enter Idle mode,
stopping the CPU but allowing SPI, UART, Analog Comparator, ADC, Timer/Counters, Watch-
dog, and the interrupt system to continue operating. This sleep mode basically halt clk
clk
Idle mode enables the MCU to wake up from external triggered interrupts as well as internal
ones like the Timer Overflow and UART Transmit Complete interrupts. If wake-up from the Ana-
log Comparator interrupt is not required, the Analog Comparator can be powered down by
setting the ACD bit in the Analog Comparator Control and Status Register – ACSR. This will
FLASH
X
, while allowing the other clocks to run.
1. Only recommended with external crystal or resonator selected as clock source
2. Only level interrupt
X
X
X
X
presents the different clock systems in the ATmega16M1/32M1/64M1,
Oscillators
X
X
X
Table 9-2 on page 40
ATmega16M1/32M1/64M1
X
X
X
X
(2)
(2)
(2)
X
X
Wake-up Sources
for a summary.
X
X
X
X
X
X
X
X
Table 9-1
CPU
X
and
37
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