ATmega3290 Atmel Corporation, ATmega3290 Datasheet - Page 18

• Manufacturer Part Number: ATmega3290
• Manufacturer: Atmel Corporation

Specifications of ATmega3290

• Flash (kbytes): 32 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7. AVR ATmega329/3290/649/6490 Memories
7.1
18
In-System Reprogrammable Flash Program Memory
ATmega329/3290/649/6490
This section describes the different memories in the ATmega329/3290/649/6490. The Atmel
AVR
space. In addition, the ATmega329/3290/649/6490 features an EEPROM Memory for data stor-
age. All three memory spaces are linear.
The ATmega329/3290/649/6490 contains 32/64Kbytes On-chip In-System Reprogrammable
Flash memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash
is organized as 16/32K x 16. For software security, the Flash Program memory space is divided
into two sections, Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega329/3290/649/6490 Program Counter (PC) is 14/15 bits wide, thus addressing the
16/32K program memory locations. The operation of Boot Program section and associated Boot
Lock bits for software protection are described in detail in
Write Self-Programming” on page
description on Flash data serial downloading using the SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 7-1.
®
architecture has two main memory spaces, the Data Memory and the Program Memory
15.
Program Memory Map
Application Flash Section
Boot Flash Section
Program Memory
278.
“Memory Programming” on page 293
“Boot Loader Support – Read-While-
0x0000
0x3FFF/0x7FFF
“Instruction Execution Tim-
contains a detailed
2552K–AVR–04/11
®