ATtiny167 Automotive Atmel Corporation, ATtiny167 Automotive Datasheet - Page 22

• Manufacturer Part Number: ATtiny167 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny167 Automotive

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

3.5.2
3.5.3
22
ATtiny87/ATtiny167
EEDR – EEPROM Data Register
EECR – EEPROM Control Register
• Bit 7:1 – Reserved Bits
These bits are reserved for future use and will always read as 0 in ATtiny87/167.
• Bits 8:0 – EEAR8:0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL – specifies the high EEPROM
address in the EEPROM space (see “E2 size” in
bytes are addressed linearly between 0 and “E2 size”. The initial value of EEAR is undefined.
A proper value must be written before the EEPROM may be accessed.
Note:
• Bits 7:0 – EEDR7:0: EEPROM Data
For the EEPROM write operation the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
• Bit 7,6 – Res: Reserved Bits
These bits are reserved for future use and will always read as 0 in ATtiny87/167. After reading,
mask out these bits. For compatibility with future AVR devices, always write these bits to zero.
• Bits 5, 4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bits setting defines which programming action that will be
triggered when writing EEPE. It is possible to program data in one atomic operation (erase the
old value and program the new value) or to split the Erase and Write operations in two differ-
ent operations. The Programming times for the different modes are shown in
EEPE is set, any write to EEPMn will be ignored. During reset, the EEPMn bits will be reset to
0b00 unless the EEPROM is busy programming.
Table 3-2.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
EEPM1
0
0
1
1
For information only - ATtiny47: EEAR8 exists as register bit but it is not used for addressing.
EEPM0
EEPROM Mode Bits
EEDR7
0
1
0
1
R/W
R
7
0
7
–
0
Programming Time Operation
EEDR6
R/W
R
6
0
6
–
0
Typical
3.4 ms
1.8 ms
1.8 ms
–
EEDR5
EEPM1
R/W
R/W
X
5
0
5
EEDR4
EEPM0
Erase and Write in one operation (Atomic Operation)
Erase Only
Write Only
Reserved for future use
R/W
R/W
X
4
0
4
Table 3-1 on page
EEDR3
EERIE
R/W
R/W
3
0
3
0
EEMPE
EEDR2
R/W
R/W
2
0
2
0
EEDR1
EEPE
R/W
R/W
15). The EEPROM data
X
1
0
1
EEDR0
EERE
Table
R/W
R/W
0
0
0
0
7728G–AVR–06/10
3-2. While
EEDR
EECR