ATtiny861 Automotive Atmel Corporation, ATtiny861 Automotive Datasheet - Page 99

• Manufacturer Part Number: ATtiny861 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny861 Automotive

• Flash (kbytes): 8 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

16.5
7753F–AVR–01/11
Dead Time Generator
The Dead Time Generator is provided for the Timer/Counter1 PWM output pairs to allow driving
external power control switches safely. The Dead Time Generator is a separate block that can
be used to insert dead times (non-overlapping times) for the Timer/Counter1 complementary
output pairs OC1x and OC1x when the PWM mode is enabled and the COM1x1:0 bits are set to
“01”. The sharing of tasks is as follows: the Waveform Generator generates the Waveform Out-
put (OCW1x) and the Dead Time Generator generates the non-overlapping PWM output pair
from the Waveform Output. Three Dead Time Generators are provided, one for each PWM out-
put. The non-overlap time is adjustable and the PWM output and it’s complementary output are
adjusted separately, and independently for both PWM outputs.
Figure 16-6. Output Compare Unit, Block Diagram
The Dead Time Generation is based on the 4-bit down counters that count the dead time, as
shown in
can divide the Timer/Counter1 clock (PCK or CK) by 1, 2, 4 or 8. This provides for large range of
dead times that can be generated. The prescaler is controlled by two control bits DTPS11..10.
The block has also a rising and falling edge detector that is used to start the dead time counting
period. Depending on the edge, one of the transitions on the rising edges, OC1x or OC1x is
delayed until the counter has counted to zero. The comparator is used to compare the counter
with zero and stop the dead time insertion when zero has been reached. The counter is loaded
with a 4-bit DT1H or DT1L value from DT1 I/O register, depending on the edge of the Waveform
Output (OCW1x) when the dead time insertion is started. The Output Compare Output are
delayed by one timer clock cycle at minimum from the Waveform Output when the Dead Time is
adjusted to zero. The outputs OC1x and OC1x are inverted, if the PWM Inversion Mode bit
PWM1X is set. This will also cause both outputs to be high during the dead time.
Figure 16-7. Dead Time Generator
CK OR PCK
OCWnx
CLOCK
bottom
FOCn
top
TCCRnB REGISTER
Figure
PRE-SCALER
DEAD TIME
16-7. There is a dedicated prescaler in front of the Dead Time Generator that
PWMnx
Waveform Generator
WGM10
CLOCK CONTROL
COMnx
ATtiny261/ATtiny461/ATtiny861
CK OR PCK
OCWnx
CLOCK
DTn I/O REGISTER
4-BIT COUNTER
COMPARATOR
DTPSn
Dead Time Generator
DATA BUS (8-bit)
DTnH
DTnL
OCnx
OCnx
PWM1X
PWM1X
OCnx
OCnx
pin
pin
OCnx
OCnx
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