ATtiny88 Automotive Atmel Corporation, ATtiny88 Automotive Datasheet - Page 24
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
ATtiny88 Automotive
Manufacturer Part Number
ATtiny88 Automotive
Description
Manufacturer
Atmel Corporation
Specifications of ATtiny88 Automotive
Flash (kbytes)
8 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
28
Ext Interrupts
28
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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Atmel ATtiny24/44/84 [Preliminary]
GPIOR2 – General Purpose I/O Register 2
GPIOR1 – General Purpose I/O Register 1
GPIOR0 – General Purpose I/O Register 0
• Bit 0 – EERE: EEPROM Read Enable
The EEPROM read enable signal, EERE, is the read strobe for the EEPROM. When the cor-
rect address is set up in the EEAR register, the EERE bit must be written to logical one to
trigger the EEPROM read. The EEPROM read access takes one instruction, and the
requested data are available immediately. When the EEPROM is read, the CPU is halted for
four cycles before the next instruction is executed. The user should poll the EEPE bit before
starting the read operation. If a write operation is in progress, it is not possible to read the
EEPROM or change the EEAR register.
Bit
0x15 (0x35)
Read/Write
Initial Value
Bit
0x14 (0x34)
Read/Write
Initial Value
Bit
0x13 (0x33)
Read/Write
Initial Value
MSB
MSB
MSB
R/W
R/W
R/W
7
0
7
0
7
0
R/W
R/W
R/W
6
0
6
0
6
0
R/W
R/W
R/W
5
0
5
0
5
0
R/W
R/W
R/W
4
0
4
0
4
0
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
R/W
R/W
R/W
1
0
1
0
1
0
LSB
LSB
LSB
R/W
R/W
R/W
0
0
0
0
0
0
7701E–AVR–02/11
GPIOR2
GPIOR1
GPIOR0
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