ATUC128L4U Atmel Corporation, ATUC128L4U Datasheet - Page 22

• Manufacturer Part Number: ATUC128L4U
• Manufacturer: Atmel Corporation

Specifications of ATUC128L4U

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

22
AVR32
Table 2-8.
Name
AT
AR
MMUT
F
J
P
O
CONFIG0 Fields (Continued)
Bit
15:13
12:10
9:7
6
5
4
3
Description
Architecture type
Value
0
1
Other
Architecture Revision. Specifies which revision of the AVR32
architecture the processor implements.
Value
0
1
2
3
Other
MMU type
Value
0
1
2
3
Other
Floating-point unit implemented
Value
0
1
Java extension implemented
Value
0
1
Performance counters implemented
Value
0
1
On-Chip Debug implemented
Value
0
1
Semantic
AVR32A
AVR32B
Reserved
Semantic
Revision 0
Revision 1
Revision 2
Revision 3
Reserved
Semantic
None, using direct mapping and no segmentation
ITLB and DTLB
Shared TLB
Memory Protection Unit
Reserved
Semantic
No FPU implemented
FPU implemented
Semantic
No Java extension implemented
Java extension implemented
Semantic
No Performance Counters implemented
Performance Counters implemented
Semantic
No OCD implemented
OCD implemented
32000D–04/2011