ATxmega128A4U Atmel Corporation, ATxmega128A4U Datasheet - Page 310

• Manufacturer Part Number: ATxmega128A4U
• Manufacturer: Atmel Corporation

Specifications of ATxmega128A4U

• Flash (kbytes): 128 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 7
• Twi (i2c): 2
• Uart: 5
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 16
• Input Capture Channels: 16
• Pwm Channels: 16
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

23.15.6
23.15.7
8331A–AVR–07/11
BAUDCTRLA – Baud Rate Register
BAUDCTRLB – Baud Rate Register
• Bit 2 – UDORD: Data Order
This bit sets the frame format. When written to one, the lsb of the data word is transmitted first.
When written to zero, the msb of the data word is transmitted first. The receiver and transmitter
use the same setting. Changing the setting of UDORD will corrupt all ongoing communication for
both receiver and transmitter. This bit is valid only for master SPI mode.
• Bit 1 – UCPHA: Clock Phase
The UCPHA bit setting determine whether data are sampled on the leading (first) edge or tailing
(last) edge of XCKn. Refer to the
• Bit 7:0 – BSEL[7:0]: Baud Rate Register
These are the lower 8 bits of the 12-bit BSEL value used for USART baud rate setting. BAUDC-
TRLB contains the four most-significant bits. Ongoing transmissions by the transmitter and
receiver will be corrupted if the baud rate is changed. Writing BSEL will trigger an immediate
update of the baud rate prescaler. See the equations in
• Bit 7:4 – BSCALE[3:0]: Baud Rate Scale factor
These bits select the baud rate generator scale factor. The scale factor is given in two's comple-
ment form from -7 (0b1001) to +7 (0b0111). The -8 (0b1000) setting is reserved. See the
equations in
• Bit 3:0 – BSEL[11:8]: Baud Rate Register
These are the upper 4 bits of the 12-bit value used for USART baud rate setting. BAUDCTRLA
contains the eight least-significant bits. Ongoing transmissions by the transmitter and receiver
will be corrupted if the baud rate is changed. Writing BAUDCTRLA will trigger an immediate
update of the baud rate prescaler.
Bit
+0x07
Read/Write
Initial Value
Bit
+0x06
Read/Write
Initial Value
Table 23-1 on page
R/W
R/W
7
0
7
0
R/W
R/W
6
0
6
0
BSCALE[3:0]
R/W
R/W
5
0
5
0
293.
”Master SPI Mode Clock Generation” on page 294
R/W
R/W
4
0
4
0
BSEL[7:0]
R/W
R/W
3
0
3
0
Atmel AVR XMEGA AU
Table 23-1 on page
R/W
R/W
2
0
2
0
BSEL[11:8]
R/W
R/W
1
0
1
0
293.
R/W
R/W
0
0
0
0
for details.
BAUDCTRLA
BAUDCTRLB
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