ATxmega128A4U Atmel Corporation, ATxmega128A4U Datasheet - Page 384

• Manufacturer Part Number: ATxmega128A4U
• Manufacturer: Atmel Corporation

Specifications of ATxmega128A4U

• Flash (kbytes): 128 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 7
• Twi (i2c): 2
• Uart: 5
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 16
• Input Capture Channels: 16
• Pwm Channels: 16
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

29.7
29.8
29.9
8331A–AVR–07/11
DAC clock
Low Power mode
Calibration
Figure 29-2. DAC output model
The DAC is clocked from the Peripheral clock (clk
how fast new data can be clocked into the DAC data registers.
To reduce the power consumption in DAC conversions, the DAC may be set in a Low Power
mode. Conversion time will be longer if new conversions are started in this mode. This increases
the DAC conversion time per DAC channel by a factor of two.
For improved accuracy, it is possible to calibrate for both gain and offset error in the DAC.
To get the best calibration result, it is recommended to use the same DAC configuration during
calibration as it will be used in the final application. The theoretical transfer function for the DAC
was shown in
can be expressed as:
To calibrate for offset error, output the DAC channel's middle code (0x800) and adjust the offset
calibration value until the measured output value is as close as possible to the middle value
(VREF / 2).
To calibrate for gain error, output the DAC channel's maximum code (0xFFF) and adjust the gain
calibration value until the measured output value is as close as possible to the top value
(VREF * 4095) / 4096). The gain calibration controls the slope of the DAC characteristic by rotat-
ing the transfer function around the mid code.
V
DAC voltage
DACxX
=
VREF g
”Overview” on page
× ain
Buffer
⎛
⎝
CHnDATA
--------------------------- -
0xFFF
+
382. Including gain andd offset errors, the DAC output value
offset
DAC out
⎞
⎠
PER
Atmel AVR XMEGA AU
R
R
feedback
) directly, and this puts the limitation on
channel
DAC output
384