ATxmega128D4 Atmel Corporation, ATxmega128D4 Datasheet - Page 52

no-image

ATxmega128D4

Manufacturer Part Number
ATxmega128D4
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega128D4

Flash (kbytes)
128 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATxmega128D4-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATxmega128D4-CU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATxmega128D4-CU
Manufacturer:
MICROCH
Quantity:
20 000
Part Number:
ATxmega128D4-MH
Manufacturer:
SIRENZA
Quantity:
7 600
Part Number:
ATxmega128D4-U
Manufacturer:
ATMEL
Quantity:
1
Part Number:
ATxmega128D4-U
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
8210B–AVR–04/10
• Bit 6:5 - QDIRM[1:0]: Quadrature Decode Index Recognition Mode
These bits determine the quadrature state for the QDPH0 and QDPH90 signals where a valid
index signal is recognized and the counter index data event is given according to
page
nal is used.
These bits are only available for CH0CTRL and CH2CTRL
Table 5-5.
• Bit 4 - QDIEN: Quadrature Decode Index Enable
When this bit is set the event channel will be used as QDEC index source, and the index data
event will be enabled.
These bit is only available for CH0CTRL and CH2CTRL.
• Bit 3 - QDEN: Quadrature Decode Enable
Setting this bit enables QDEC operation.
These bits is only available for CH0CTRL and CH2CTRL.
• Bit 2:0 - DIGFILT[2:0]: Digital Filter Coefficient
These bits define the length of digital filtering used. Events will be passed through to the event
channel only when the event source has been active and sampled with the same level for a a
number of peripheral clock for the number of cycles as defined by DIGFILT.
Table 5-6.
QDIRM[1:0]
0
0
1
1
52. These bits is only needed to set when a quadrature encoed with a connected index sig-
DIGFILT[2:0]
0
1
0
1
000
001
010
011
100
101
110
111
QDIRM Bit Settings
Digital Filter Coefficient values
Index Recognition State
{QDPH0, QDPH90} = 0b00
{QDPH0, QDPH90} = 0b01
{QDPH0, QDPH90} = 0b10
{QDPH0, QDPH90} = 0b11
Group Configuration
1SAMPLE
2SAMPLES
3SAMPLES
4SAMPLES
5SAMPLES
6SAMPLES
7SAMPLES
8SAMPLES
Description
1 sample
2 samples
3 samples
4 samples
5 samples
6 samples
7 samples
8 samples
XMEGA D
Table 5-5 on
52

Related parts for ATxmega128D4