ATxmega192D3 Atmel Corporation, ATxmega192D3 Datasheet - Page 98

• Manufacturer Part Number: ATxmega192D3
• Manufacturer: Atmel Corporation

Specifications of ATxmega192D3

• Flash (kbytes): 192 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 200
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 18
• Input Capture Channels: 18
• Pwm Channels: 18
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8134I–AVR–12/10
16. NMI Flag for Crystal Oscillator Failure automatically cleared
17. Writing EEPROM or Flash while reading any of them will not work
18. Crystal start-up time required after power-save even if crystal is source for RTC
19. RTC Counter value not correctly read after sleep
20. Pending asynchronous RTC-interrupts will not wake up device
21. TWI Transmit collision flag not cleared on repeated start
NMI flag for Crystal Oscillator Failure (XOSCFDIF) will be automatically cleared when exe-
cuting the NMI interrupt handler.
Problem fix/Workaround
This device revision has only one NMI interrupt source, so checking the interrupt source in
software is not required.
The EEPROM and Flash cannot be written while reading EEPROM or Flash, or while exe-
cuting code in Active mode.
Problem fix/Workaround
Enter IDLE sleep mode within 2.5 µs (Five 2 MHz clock cycles and 80 32 MHz clock cycles)
after starting an EEPROM or flash write operation. Wake-up source must either be
EEPROM ready or NVM ready interrupt. Alternatively set up a Timer/Counter to give an
overflow interrupt 7 ms after the erase or write operation has started, or 13 ms after atomic
erase-and-write operation has started, and then enter IDLE sleep mode.
Even if 32.768 kHz crystal is used for RTC during sleep, the clock from the crystal will not be
ready for the system before the specified start-up time. See "XOSCSEL[3:0]: Crystal Oscilla-
tor Selection" in XMEGA A Manual. If BOD is used in active mode, the BOD will be on during
this period (0.5s).
Problem fix/Workaround
If faster start-up is required, go to sleep with internal oscillator as system clock.
If the RTC is set to wake up the device on RTC Overflow and bit 0 of RTC CNT is identical to
bit 0 of RTC PER as the device is entering sleep, the value in the RTC count register can not
be read correctly within the first prescaled RTC clock cycle after wakeup. The value read will
be the same as the value in the register when entering sleep.
The same applies if RTC Compare Match is used as wake-up source.
Problem fix/Workaround
Wait at least one prescaled RTC clock cycle before reading the RTC CNT value.
Asynchronous Interrupts from the Real-Time-Counter that is pending when the sleep
instruction is executed, will be ignored until the device is woken from another source or the
source triggers again.
Problem fix/Workaround
None.
The TWI transmit collision flag should be automatically cleared on start and repeated start,
but is only cleared on start.
Problem fix/Workaround
Clear the flag in software after address interrupt.
XMEGA D3
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