ATxmega256A3U Atmel Corporation, ATxmega256A3U Datasheet - Page 7

• Manufacturer Part Number: ATxmega256A3U
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3U

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

6. AVR CPU
6.1
6.2
8386A–AVR–07/11
Features
Overview
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The Atmel
to execute the code and perform all calculations. The CPU is able to access memories, perform
calculations, control peripherals, and execute the program from the FLASH memory. Interrupt
handling is described in a separate section, refer to
Interrupt Controller” on page
Figure 6-1 on page 7
Figure 6-1.
In order to maximize performance and parallelism, the AVR uses a Harvard architecture with
separate memories and buses for program and data. Instructions in the program memory are
executed with a single level pipelining. While one instruction is being executed, the next instruc-
8/16-bit high performance AVR RISC Architecture
32x8-bit registers directly connected to the ALU
Stack in SRAM
Stack Pointer accessible in I/O memory space
Direct addressing of up to 16Mbytes of program and 16Mbytes of data memory
True 16/24-bit access to 16/24-bit I/O registers
Support for 8-, 16- and 32-bit Arithmetic
Configuration Change Protection of system critical features
– 142 instructions
– Hardware multiplier
®
AVR
Block Diagram of the AVR CPU architecture
®
XMEGA
shows the block diagram of the AVR CPU architecture.
®
devices use the 8/16-bit AVR CPU. The main function of the CPU is
26.
”Interrupts and Programmable Multi-level
XMEGA A3U
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