ATxmega64A4U Atmel Corporation, ATxmega64A4U Datasheet - Page 411
ATxmega64A4U
Manufacturer Part Number
ATxmega64A4U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A4U
Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A4U-AU
Manufacturer:
ON
Quantity:
29 000
Company:
Part Number:
ATxmega64A4U-U
Manufacturer:
ATMEL
Quantity:
74
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32.3
8331A–AVR–07/11
PDI Physical
1149.1 compliant, and supports boundary scan. Any external programmer or on-chip debug-
ger/emulator can be directly connected to either of these interfaces. Unless otherwise stated, all
references to the PDI assume access through the PDI physical layer.
Figure 32-1. The PDI with JTAG and PDI physical layers and closely related modules (grey).
The PDI physical layer handles the low-level serial communication. It uses a bidirectional, half-
duplex, synchronous serial receiver and transmitter (just as a USART in USRT mode). The
physical layer includes start-of-frame detection, frame error detection, parity generation, parity
error detection, and collision detection.
In addition to PDI_CLK and PDI_DATA, the PDI_DATA pin has an internal pull resistor, V
GND must be connected between the External Programmer/debugger and the device.
32-2 on page 411
Figure 32-2. PDI connection.
The remainder of this section is intended for use only by third parties developing programmers
or programming support for Atmel AVR XMEGA devices.
PDI_CLK
PDI_DATA
TDI
TMI
TCK
TDO
Program and Debug Interface (PDI)
(physical layer)
(physical layer)
JTAG Physical
PDI_DATA
shows a typical connection.
PDI Physical
PDI_CLK
Vcc
Vcc
Connector
Controller
PDI
Atmel AVR XMEGA AU
PDIBUS
Internal Interfaces
Controller
Memories
OCD
NVM
NVM
CC
Figure
and
411
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