M42800A Atmel Corporation, M42800A Datasheet - Page 27
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M42800A
Manufacturer Part Number
M42800A
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.M42800A.pdf
(224 pages)
4.M42800A.pdf
(27 pages)
Specifications of M42800A
Flash (kbytes)
0 Kbytes
Pin Count
144
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
54
Usb Speed
No
Usb Interface
No
Spi
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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1.2
1.2.1
1.2.2
ARM DDI 0029G
Architecture
Instruction compression
The Thumb instruction set
The ARM7TDMI processor has two instruction sets:
•
•
The ARM7TDMI processor is an implementation of the ARMv4T architecture. For full
details of both the ARM and Thumb instruction sets refer to the ARM Architecture
Reference Manual.
This section describes:
•
•
Microprocessor architectures traditionally had the same width for instructions, and data.
Therefore 32-bit architectures had higher performance manipulating 32-bit data, and
could address a large address space much more efficiently than 16-bit architectures.
16-bit architectures typically had higher code density than 32-bit architectures, but
approximately half the performance.
Thumb implements a 16-bit instruction set on a 32-bit architecture to provide:
•
•
The Thumb instruction set is a subset of the most commonly used 32-bit ARM
instructions. Thumb instructions are each 16 bits long, and have a corresponding 32-bit
ARM instruction that has the same effect on the processor model. Thumb instructions
operate with the standard ARM register configuration, allowing excellent
interoperability between ARM and Thumb states.
On execution, 16-bit Thumb instructions are transparently decompressed to full 32-bit
ARM instructions in real time, without performance loss.
Thumb has all the advantages of a 32-bit core:
•
•
•
•
the 32-bit ARM instruction set
the 16-bit Thumb instruction set.
Instruction compression on page 1-5
The Thumb instruction set on page 1-5.
higher performance than a 16-bit architecture
higher code density than a 32-bit architecture.
32-bit address space
32-bit registers
32-bit shifter, and Arithmetic Logic Unit (ALU)
32-bit memory transfer.
Copyright © 1994-2001. All rights reserved.
Introduction
1-5
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