R40008 Atmel Corporation, R40008 Datasheet - Page 29
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
R40008
Manufacturer Part Number
R40008
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.R40008.pdf
(19 pages)
4.R40008.pdf
(20 pages)
Specifications of R40008
Flash (kbytes)
0 Kbytes
Pin Count
100
Max. Operating Frequency
75 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
256
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
No
Calibrated Rc Oscillator
No
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Wait States
Standard Wait States
1354D–ATARM–08/02
Figure 17. Data Hold Time
In early read protocol the data can remain valid longer than in standard read protocol
due to the additional wait cycle which follows a write access.
The EBI can automatically insert wait states. The different types of wait states are listed
below:
•
•
•
•
•
Each chip select can be programmed to insert one or more wait states during an access
on the corresponding device. This is done by setting the WSE field in the corresponding
EBI_CSR. The number of cycles to insert is programmed in the NWS field in the same
register.
Below is the correspondence between the number of standard wait states programmed
and the number of cycles during which the NWE pulse is held low:
For each additional wait state programmed, an additional cycle is added.
Standard wait states
Data float wait states
External wait states
Chip select change wait states
Early read wait states (see “Read Protocols” )
0 wait states1/2 cycle
1 wait state1 cycle
Data Output
ADDR
NWE
MCK
AT91X40 Series
29
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