SAM3S2C Atmel Corporation, SAM3S2C Datasheet - Page 887
SAM3S2C
Manufacturer Part Number
SAM3S2C
Description
Manufacturer
Atmel Corporation
Specifications of SAM3S2C
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
39
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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36.7.8
Name:
Address:
Access:
• CHIDx: Counter Event on Channel x
0 = No new counter event has occurred since the last read of the PWM_ISR1 register.
1 = At least one counter event has occurred since the last read of the PWM_ISR1 register.
• FCHIDx: Fault Protection Trigger on Channel x
0 = No new trigger of the fault protection since the last read of the PWM_ISR1 register.
1 = At least one trigger of the fault protection since the last read of the PWM_ISR1 register.
Note:
6500C–ATARM–8-Feb-11
31
23
15
–
–
–
7
–
Reading PWM_ISR1 automatically clears CHIDx and FCHIDx flags.
PWM Interrupt Status Register 1
30
22
14
0x4002001C
–
–
–
6
–
PWM_ISR1
Read-only
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
FCHID3
CHID3
27
19
11
–
–
3
FCHID2
CHID2
26
18
10
–
–
2
FCHID1
CHID1
25
17
–
9
–
1
SAM3S
FCHID0
CHID0
24
16
–
8
–
0
887
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