SAM3S4A Atmel Corporation, SAM3S4A Datasheet - Page 739
SAM3S4A
Manufacturer Part Number
SAM3S4A
Description
Manufacturer
Atmel Corporation
Specifications of SAM3S4A
Flash (kbytes)
256 Kbytes
Pin Count
48
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
48
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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33.8.15
Name:
Addresses:
Access:
This register can only be written if the WPEN bit is cleared in
• TX_PL: Transmitter Preamble Length
0: The Transmitter Preamble pattern generation is disabled
1 - 15: The Preamble Length is TX_PL x Bit Period
• TX_PP: Transmitter Preamble Pattern
The following values assume that TX_MPOL field is not set:
• TX_MPOL: Transmitter Manchester Polarity
0: Logic Zero is coded as a zero-to-one transition, Logic One is coded as a one-to-zero transition.
1: Logic Zero is coded as a one-to-zero transition, Logic One is coded as a zero-to-one transition.
• RX_PL: Receiver Preamble Length
0: The receiver preamble pattern detection is disabled
1 - 15: The detected preamble length is RX_PL x Bit Period
• RX_PP: Receiver Preamble Pattern detected
The following values assume that RX_MPOL field is not set:
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11
Value
Value
31
23
15
–
–
–
7
–
00
01
10
11
00
USART Manchester Configuration Register
Name
ALL_ONE
ALL_ZERO
ZERO_ONE
ONE_ZERO
Name
ALL_ONE
DRIFT
30
22
14
US_MAN
0x40024050 (0), 0x40028050 (1)
Read-write
–
–
6
–
Description
The preamble is composed of ‘01’s
Description
The preamble is composed of ‘1’s
The preamble is composed of ‘0’s
The preamble is composed of ‘10’s
The preamble is composed of ‘1’s
29
21
13
1
–
–
5
–
RX_MPOL
TX_MPOL
28
20
12
–
4
–
“USART Write Protect Mode Register” on page
27
19
11
–
–
3
26
18
10
–
–
2
RX_PL
TX_PL
25
17
9
1
RX_PP
TX_PP
SAM3S
SAM3S
741.
24
16
8
0
739
739
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