SAM3S4A Atmel Corporation, SAM3S4A Datasheet - Page 880
SAM3S4A
Manufacturer Part Number
SAM3S4A
Description
Manufacturer
Atmel Corporation
Specifications of SAM3S4A
Flash (kbytes)
256 Kbytes
Pin Count
48
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
48
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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36.7.1
Name:
Address:
Access:
This register can only be written if the bits WPSWS0 and WPHWS0 are cleared in
page
• DIVA, DIVB: CLKA, CLKB Divide Factor
• PREA, PREB: CLKA, CLKB Source Clock Selection
880
DIVA, DIVB
0
1
2-255
PREA, PREB
0
0
0
0
0
0
0
0
1
1
1
Other
911.
31
23
15
–
–
7
SAM3S
PWM Clock Register
0
0
0
0
1
1
1
1
0
0
0
0
0
1
1
0
0
1
1
0
0
1
30
22
14
0x40020000
–
–
6
PWM_CLK
Read-write
0
1
0
1
0
1
0
1
0
1
0
29
21
13
–
–
5
CLKA, CLKB
CLKA, CLKB clock is turned off
CLKA, CLKB clock is clock selected by PREA, PREB
CLKA, CLKB clock is clock selected by PREA, PREB divided by DIVA, DIVB factor.
Divider Input Clock
MCK
MCK/2
MCK/4
MCK/8
MCK/16
MCK/32
MCK/64
MCK/128
MCK/256
MCK/512
MCK/1024
Reserved
28
20
12
–
–
4
DIVB
DIVA
27
19
11
3
“PWM Write Protect Status Register” on
26
18
10
2
PREB
PREA
25
17
9
1
6500C–ATARM–8-Feb-11
24
16
8
0
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