SAM9G15 Atmel Corporation, SAM9G15 Datasheet - Page 22

• Manufacturer Part Number: SAM9G15
• Manufacturer: Atmel Corporation

Specifications of SAM9G15

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 6
• Lin: 4
• Ssc: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

6.8
22
DMA Controller 0
SAM9G35
The DMA controller can handle the transfer between peripherals and memory and so receives
the triggers from the peripherals below. The hardware interface numbers are also given in
6-4.
Table 6-4.
Instance name
HSMCI0
SPI0
SPI0
USART0
USART0
USART1
USART1
TWI0
TWI0
TWI2
TWI2
UART0
UART0
SSC
SSC
• Two Masters
• Embeds 8 channels
• 64-byte FIFO for channel 0, 16-byte FIFO for Channel 1 to 7
• features:
– Linked List support with Status Write Back operation at End of Transfer
– Word, HalfWord, Byte transfer support.
– memory to memory transfer
– Peripheral to memory
– Memory to peripheral
DMA Channel Definition
T/R
RX/TX
TX
RX
TX
RX
TX
RX
TX
RX
TX
RX
TX
RX
TX
RX
10
13
DMA Channel HW
interface Number
0
1
2
3
4
5
6
7
8
9
11
12
14
11053AS–ATARM–27-Jul-11
Table