SAM9G15 Atmel Corporation, SAM9G15 Datasheet - Page 29

• Manufacturer Part Number: SAM9G15
• Manufacturer: Atmel Corporation

Specifications of SAM9G15

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 6
• Lin: 4
• Ssc: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 8-1.
11053AS–ATARM–27-Jul-11
SAM9G35 System Controller Block Diagram
PD0-PD21
PC0-PC31
PB0-PB18
PA0-PA31
XOUT32
VDDBU
WKUP
SHDN
XIN32
XOUT
NRST
XIN
VDDCORE
MAIN OSC
VDDBU
CLOCK
dbgu_irq
12MHz
SLOW
pmc_irq
periph_irq[2..30]
wdt_irq
rstc_irq
POR
POR
OSC
PLLA
UPLL
periph_clk[2..3]
backup_nreset
pit_irq
periph_nreset
periph_nreset
periph_nreset
periph_nreset
proc_nreset
12M RC
dbgu_rxd
dbgu_rxd
OSC
debug
debug
SLCK
SLCK
SLCK
SLCK
MCK
MCK
backup_nreset
idle
irq
fiq
SCKCR
SCKCR
rtc_alarm
int
32K RC
por_ntrst
jtag_nreset
OSC
MAINCK
UPLLCK
PLLACK
SLCK
System Controller
Management
Shut-Down
Real-Time
Advanced
Watchdog
Controllers
Controller
Controller
Controller
Controller
Interrupt
Periodic
Interval
Debug
BSCR
Power
Reset
Timer
Timer
Clock
PIO
Unit
wdt_fault
WDRPROC
4 General-purpose
Backup Registers
SMDCK = periph_clk[4]
dbgu_irq
dbgu_txd
pit_irq
wdt_irq
rstc_irq
periph_nreset
proc_nreset
backup_nreset
rtc_irq
rtc_alarm
periph_clk[2..30]
pck[0-1]
PCK
MCK
DDR sysclk
pmc_irq
idle
periph_irq[2..3]
irq
fiq
dbgu_txd
int
UHP12M
LCD Pixel clock
UHP48M
VDDBU Powered
VDDCORE Powered
por_ntrst
periph_clk[5..30]
periph_irq[5..30]
periph_nreset
periph_nreset
periph_irq[23]
periph_nreset
periph_irq[22]
periph_nreset
periph_irq[4]
periph_nreset
in
out
enable
proc_nreset
jtag_nreset
UHP48M
UPLLCK
UHP12M
UPLLCK
SMDCK
debug
MCK
PCK
nirq
nfiq
ntrst
USB High Speed
USB High Speed
Software Modem
Boundary Scan
TAP Controller
ARM926EJ-S
Device Port
Peripherals
Bus Matrix
Embedded
Host Port
SMD
SAM9G35
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