SAM9R64 Atmel Corporation, SAM9R64 Datasheet - Page 861
SAM9R64
Manufacturer Part Number
SAM9R64
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9260.pdf
(290 pages)
3.SAM9261.pdf
(248 pages)
4.SAM9R64.pdf
(903 pages)
5.SAM9R64.pdf
(52 pages)
Specifications of SAM9R64
Flash (kbytes)
0 Kbytes
Pin Count
144
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
49
Ext Interrupts
49
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
5
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
3
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- SAM9260 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9R64 PDF datasheet #4
- SAM9R64 PDF datasheet #5
- Current page: 861 of 903
- Download datasheet (13Mb)
44.8.5
44.8.5.1
Table 44-26. SMC Read Signals - NRD Controlled (READ_MODE = 1)
Table 44-27. SMC Read Signals - NCS Controlled (Read_MODE = 0)
6289D–ATARM–3-Oct-11
Symbol
SMC
SMC
SMC
SMC
SMC
SMC
SMC
Symbol
SMC
SMC
1
2
3
4
5
6
7
8
9
SMC
Parameter
VDDIOM supply
Data Setup before NRD High
Data Hold after NRD High
Data Setup before NRD High
Data Hold after NRD High
A2 - A25 Valid before NRD High
NCS low before NRD High
NRD Pulse Width
NBS0/A0, NBS1, NBS2/A1, NBS3,
Read Timings
Parameter
VDDIOM supply
Data Setup before NCS High
Data Hold after NCS High
SMC timings are given in MAX (T = 85°C, VDDCORE = 1.08V) corners.
Timings are given assuming a capacitance load on data, control and address pads:
Table 44-25. Capacitance Load
In following tables t
IO Supply
3.3V
1.8V
HOLD or NO HOLD SETTINGS (nrd hold ≠ 0, nrd hold =0)
NO HOLD SETTINGS (ncs rd hold = 0)
NO HOLD SETTINGS (nrd hold = 0)
Corner
CPMCK
50 pF
30 pF
(nrd setup + nrd pulse - ncs rd setup)
MAX
HOLD SETTINGS (nrd hold ≠ 0)
(nrd setup + nrd pulse)* t
is MCK period.
nrd pulse * t
* t
CPMCK
1.8V
12.5
1.8V
12.1
9.6
0
0
0
CPMCK
- 2.2
- 0.3
CPMCK
Min in MAX corner
Min in MAX corner
- 2.3
AT91SAM9R64/RL64
(nrd setup + nrd pulse)* t
(nrd setup + nrd pulse - ncs rd
nrd pulse * t
setup) * t
3.3V
12.6
3.3V
11.4
8.8
2.3
0
CPMCK
0
0
CPMCK
- 3.6
- 0.4
CPMCK
-
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
861
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