SAM9X35 Atmel Corporation, SAM9X35 Datasheet - Page 11
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SAM9X35
Manufacturer Part Number
SAM9X35
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9X25.pdf
(45 pages)
3.SAM9X25.pdf
(1145 pages)
4.SAM9X25.pdf
(45 pages)
5.SAM9X25.pdf
(1325 pages)
Specifications of SAM9X35
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Table 4-3.
4.3
11055AS–ATARM–27-Jul-11
Ball
N4
R1
R4
R3
U3
U1
U2
U4
R5
U5
U6
R6
U7
R7
U8
R9
R8
U9
D3
D4
L3
P1
L4
T3
P4
T1
T2
T4
P5
T5
T6
T7
T8
P8
217-ball BGA Package Pinout
Power Rail
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDANA
VDDANA
Pin Description BGA217
GPIO_CLK
GPIO_CLK
GPIO_CLK
I/O Type
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
Indicates if Schmitt Trigger is enabled.
Note:
• “ST”
Signal
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PB0
PB1
Primary
Example:
configured as an Input with Pull-Up and Schmitt Trigger enabled. PD14 reset state is “PIO, I, PU”.
That means PIO Input with Pull-Up. PD15 reset state is “A20, O, PD” which means output address
line 20 with Pull-Down.
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
The PB18 “Reset State” column shows “PIO, I, PU, ST”. That means the line PIO18 is
Signal
Alternate
Dir
SPI0_NPCS0
SPI0_SPCK
SPI0_MISO
SPI0_MOSI
MCI0_CDA
MCI0_DA0
MCI0_DA1
MCI0_DA2
MCI0_DA3
PIO Peripheral A
MCI0_CK
Signal
TWCK0
TCLK0
TCLK1
TCLK2
DRXD
TIOA0
TIOA1
TIOA2
TIOB0
TIOB1
TIOB2
TWD0
RXD0
RXD1
RXD2
DTXD
TXD0
RTS0
CTS0
SCK0
TXD1
TXD2
ERX0
ERX1
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
SPI1_NPCS1
SPI0_NPCS2
SPI0_NPCS1
SPI1_NPCS3
SPI1_NPCS0
SPI1_NPCS2
SPI1_MISO
SPI1_MOSI
SPI1_SPCK
MCI1_CDA
MCI1_DA1
MCI1_DA2
MCI1_DA3
MCI1_DA0
PIO Peripheral B
MCI1_CK
CANTX1
CANRX1
CANRX0
CANTX0
Signal
RTS2
CTS2
TD
RD
RK
RF
TK
TF
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
I
I
I
I
PIO Peripheral C
Signal
ETXEN
EMDC
ETX0
ETX1
SAM9X35
Dir
O
O
O
O
Signal, Dir, PU,
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
Reset State
PD, ST
11