AD9628 Analog Devices, AD9628 Datasheet - Page 9

• Manufacturer Part Number: AD9628
• Description: 12-Bit, 125/105 MSPS, 1.8 V Dual Analog-to-Digital Converter
• Manufacturer: Analog Devices

Specifications of AD9628

• Resolution (bits): 12bit
• # Chan: 2
• Sample Rate: 125MSPS
• Interface: LVDS,Par
• Analog Input Type: Diff-Bip,SE-Uni
• Ain Range: 2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

TIMING SPECIFICATIONS
Table 5.
Parameter
SYNC TIMING
REQUIREMENTS
SPI TIMING
REQUIREMENTS
Timing Diagrams
t
t
t
t
t
t
t
t
t
t
t
SSYNC
HSYNC
DS
DH
CLK
S
H
HIGH
LOW
EN_SDIO
DIS_SDIO
CH A/CH B DATA
DCOA/DCOB
CLK+
CLK–
VIN
Description
SYNC to rising edge of CLK+ setup time
SYNC to rising edge of CLK+ hold time
Setup time between the data and the rising edge of SCLK
Hold time between the data and the rising edge of SCLK
Period of the SCLK
Setup time between CSB and SCLK
Hold time between CSB and SCLK
SCLK pulse width high
SCLK pulse width low
Time required for the SDIO pin to switch from an input to an output relative
to the SCLK falling edge
Time required for the SDIO pin to switch from an output to an input relative
to the SCLK rising edge
N – 1
t
CH
Figure 2. CMOS Default Output Mode Data Output Timing
N – 17
t
PD
N
t
t
A
CLK
t
DCO
t
N – 16
SKEW
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N + 1
N – 15
N + 2
N – 14
N + 3
N – 13
Limit
0.24
0.40
2
2
40
2
2
10
10
10
10
N + 4
N – 12
N + 5
Unit
ns typ
ns typ
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
AD9628