AD7192 Analog Devices, AD7192 Datasheet - Page 33
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AD7192
Manufacturer Part Number
AD7192
Description
4.8 kHz Ultra-Low Noise 24-Bit Sigma-Delta ADC with PGA
Manufacturer
Analog Devices
Datasheet
1.AD7192.pdf
(40 pages)
Specifications of AD7192
Resolution (bits)
24bit
# Chan
4
Sample Rate
4.8kSPS
Interface
Ser,SPI
Analog Input Type
Diff-Bip,Diff-Uni,SE-Bip,SE-Uni
Ain Range
± (Vref/Gain)
Adc Architecture
Sigma-Delta
Pkg Type
SOP
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clock source is used, the clock source must be connected to the
MCLK2 pin, and the MCLK1 pin can be left floating.
The internal clock can also be made available at the MCLK2
pin. This is useful when several ADCs are used in an application
and the devices must be synchronized. The internal clock from
one device can be used as the clock source for all ADCs in the
system. Using a common clock, the devices can be synchro-
nized by applying a common reset to all devices, or the SYNC
pin can be pulsed.
BURNOUT CURRENTS
The AD7192 contains two 500 nA constant current generators,
one sourcing current from AV
current from AIN(−) to AGND, where AIN(+) is the positive
analog input terminal and AIN(−) is the negative analog input
terminal in differential mode and AINCOM in pseudodiffer-
ential mode. The currents are switched to the selected analog
input pair. Both currents are either on or off, depending on the
burnout current enable (BURN) bit in the configuration
register.
These currents can be used to verify that an external transducer
is still operational before attempting to take measurements on
that channel. After the burnout currents are turned on, they
flow in the external transducer circuit, and a measurement of
the input voltage on the analog input channel can be taken. It
takes some time for the burnout currents to detect an open
circuit condition because the currents must charge any external
capacitors.
There are several reasons that a fault condition is detected. The
front-end sensor may be open circuit. It could also mean that
the front-end sensor is overloaded or the reference may be
absent and the NOREF bit in the status register is set, thus
clamping the data to all 1s.
The user must check these three cases before making a judgment.
If the voltage measured is 0 V, it may indicate that the
transducer has short circuited. The current sources work over
the normal absolute input voltage range specifications when the
analog inputs are buffered and chop is disabled.
REFERENCE
The ADC has a fully differential input capability for the
reference channel. In addition, the user has the option of
selecting one of two external reference options (REFIN1(x) or
REFIN2(x)). The reference source for the AD7192 is selected
using the REFSEL bit in the configuration register. The
REFIN2(x) pins are dual purpose: they can function as two
general-purpose output pins or as reference pins. When the
REFSEL bit is set to 1, these pins automatically function as
reference pins.
DD
to AIN(+) and one sinking
Rev. A | Page 33 of 40
The common-mode range for these differential inputs is from
AGND to AV
excessive R-C source impedances introduce gain errors. The
reference voltage REFIN (REFINx(+) − REFINx(−)) is AV
nominal, but the AD7192 is functional with reference voltages
from 1 V to AV
or current) for the transducer on the analog input also drives
the reference voltage for the part, the effect of the low frequency
noise in the excitation source is removed because the application is
ratiometric. If the AD7192 is used in a nonratiometric applica-
tion, a low noise reference should be used.
Recommended 2.5 V reference voltage sources for the AD7192
include the
references. These references have low output impedances and
are, therefore, tolerant to having decoupling capacitors on
REFINx(+) without introducing gain errors in the system.
Deriving the reference input voltage across an external resistor
means that the reference input sees a significant external source
impedance. External decoupling on the REFINx pins is not
recommended in this type of circuit configuration.
REFERENCE DETECT
The AD7192 includes on-chip circuitry to detect whether the
part has a valid reference for conversions or calibrations. This
feature is enabled when the REFDET bit in the configuration
register is set to 1. If the voltage between the selected REFINx(+)
and REFINx(−) pins is between 0.3 V and 0.6 V, the AD7192
detects that it no longer has a valid reference. In this case, the
NOREF bit of the status register is set to 1. If the AD7192 is
performing normal conversions and the NOREF bit becomes
active, the conversion result is all 1s.
Therefore, it is not necessary to continuously monitor the status
of the NOREF bit when performing conversions. It is only
necessary to verify its status if the conversion result read from
the ADC data register is all 1s. If the AD7192 is performing
either an offset or full-scale calibration and the NOREF bit
becomes active, the updating of the respective calibration
registers is inhibited to avoid loading incorrect coefficients to
these registers, and the ERR bit in the status register is set. If the
user is concerned about verifying that a valid reference is in
place every time a calibration is performed, the status of the
ERR bit should be checked at the end of the calibration cycle.
ADR421
DD
DD
. The reference input is unbuffered; therefore,
. In applications where the excitation (voltage
and ADR431, which are low noise
AD7192
DD