AD7153 Analog Devices, AD7153 Datasheet - Page 12

• Manufacturer Part Number: AD7153
• Description: 12-Bit Capacitance-to-Digital Converter (1 Capacitance Input Channel)
• Manufacturer: Analog Devices

Specifications of AD7153

• Resolution (bits): 12bit
• # Chan: 1
• Sample Rate: 200SPS
• Interface: I²C/Ser 2-Wire,Ser
• Analog Input Type: Capacitive
• Ain Range: ±0.25 pF to ±2 pF Diff,0.5 pF to 4 pF SE
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

AD7152/AD7153
The user can also access any unique register (address) on a
one-to-one basis without having to update all the registers.
However, the address pointer register contents cannot be read.
If an incorrect address pointer location is accessed, or if the user
allows the autoincrementer to exceed the required register
address, apply the following requirements:
•
•
Table 5. I
Abbreviation
S
P
A(S)
A(M)
A(S)
A(M)
ACK
R/W
In read mode, the AD7152/AD7153 continue to output
various internal register contents until the master device
issues a no acknowledge, start, or stop condition. The
contents of the address pointers autoincrementer are reset
to point to the status register at Address 0x00 when a stop
condition is received at the end of a read operation. This
allows the status register to be read (polled) continually
without having to constantly write to the address pointer.
In write mode, the data for the invalid address is not
loaded into the registers of the AD7152/AD7153, but
an acknowledge is issued by the AD7152/AD7153.
2
C Abbreviation
SEQUENCE
SEQUENCE
WRITE
READ
SDA
SCL
S SLAVE ADDR A(S)
S SLAVE ADDR A(S)
START
S
ADDR
1 to 7
LSB = 0
R/W
SUB ADDR
SUB ADDR
8
ACK
9
Figure 23. Write and Read Sequences
A(S)
A(S) S SLAVE ADDR
SUBADDRESS
Figure 22. Bus Data Transfer
1 to 7
Rev. 0 | Page 12 of 24
DATA
8
LSB = 1
Definition
Start bit
Stop bit
Acknowledge by slave
Acknowledge by master
No acknowledge by slave
No acknowledge by master
Acknowledge
Read/write
A(S)
AD7152/AD7153 RESET
To reset the AD7152/AD7153 without having to reset the entire
I
uses a particular address pointer word as a command word to
reset the part and upload all default settings. The AD7152/
AD7153 do not respond to the I
edge) during the default values upload for approximately 150 μs
(maximum 200 μs).
The reset command address word is 0xBF.
GENERAL CALL
When a master issues a slave address consisting of seven 0s with
the eighth bit (R/W bit) set to 0, this is called the general call
address. The general call address is for addressing every device
connected to the I
this address and read the following data byte.
If the second byte is 0x06, the AD7152/AD7153 are reset,
completely uploading all default values. The AD7152/AD7153
do not respond to the I
during the default values upload for approximately 150 μs
(maximum 200 μs).
The AD7152/AD7153 do not acknowledge any other general
call commands.
ACK
A(S)
2
9
C bus, an explicit reset command is provided. This command
DATA
1 to 7
DATA
DATA
A(M)
2
C bus. The AD7152/AD7153 acknowledge
8
2
C bus commands (no acknowledge)
ACK
A(S)
9
P
2
C bus commands (no acknowl-
STOP
DATA
P
A(M)
P