AD7153 Analog Devices, AD7153 Datasheet - Page 20

• Manufacturer Part Number: AD7153
• Description: 12-Bit Capacitance-to-Digital Converter (1 Capacitance Input Channel)
• Manufacturer: Analog Devices

Specifications of AD7153

• Resolution (bits): 12bit
• # Chan: 1
• Sample Rate: 200SPS
• Interface: I²C/Ser 2-Wire,Ser
• Analog Input Type: Capacitive
• Ain Range: ±0.25 pF to ±2 pF Diff,0.5 pF to 4 pF SE
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

AD7152/AD7153
DIFFERENTIAL CAPACITIVE INPUT
When configured for differential mode (the CAPDIFF bit in the
Channel 1 Setup or Channel 2 Setup registers is set to 1), the
CDC measures the difference between positive and negative
capacitance input.
Each of the two input capacitances, C
EXC and CIN pins must be less than 2 pF (without using the
CAPDACs) or must be less than 9 pF and balanced by the
CAPDACs. Balancing by the CAPDACs means that both
C
If the unbalanced capacitance between the EXC and CIN pins
is higher than 2 pF, the CDC introduces a gain error, an offset
error, and nonlinearity error (see Figure 32, Figure 33, and
Figure 34).
X
C
0pF TO 4pF
C
4pF TO 6pF
(5 ± 1pF)
− CAPDAC(+) and C
C
3pF TO 7pF
(5 ± 2pF)
X
X
X
Figure 33. Using CAPDAC in Differential Mode
Figure 34. Using CAPDAC in Differential Mode
C
0pF TO 4pF
C
4pF TO 6pF
(5 ± 1pF)
CIN(+)
CIN(–)
Y
Y
C
5pF
EXC
Figure 32. CDC Differential Input Mode
CIN(+)
CIN(–)
Y
CIN(+)
CIN(–)
EXC
EXC
CAPDIFF = 1
CAPDIFF = 1
CAPDIFF = 1
CAPDAC(+)
5pF
CAPDAC(–)
5pF
Y
CAPDAC(+)
OFF
CAPDAC(–)
OFF
CAPDAC(+)
5pF
CAPDAC(–)
5pF
− CAPDAC(−) are less than 2 pF.
X
and C
± 2pF
CDC
± 2pF
± 2pF
CDC
CDC
Y
, between the
0x0000 ... 0xFFF0
DATA
0x0000 ... 0xFFF0
DATA
0x0000 ... 0xFFF0
DATA
Rev. 0 | Page 20 of 24
PARASITIC CAPACITANCE TO GROUND
The CDC architecture used in the AD7152/AD7153 measures
C
any capacitance, C
result (see Figure 35).
The practical implementation of the circuitry in the chip
implies certain limits and the result is gradually affected by
capacitance to ground. See the allowed capacitance to GND
in the Specifications table and, Figure 9 through Figure 12.
PARASITIC RESISTANCE TO GROUND
The CDC result can be affected by a leakage current from
the C
the ground. The influence of the leakage current varies with
the power supply voltage (see Figure 36).
A higher leakage current to ground results in a gain error,
an offset error, and a nonlinearity error (see Figure 13 and
Figure 14).
X
connected between the EXC pin and the CIN pin. In theory,
R
C
X
C
R
GND1
GND1
GND2
GND2
to ground; therefore, the C
Figure 35. Parasitic Capacitance to Ground
Figure 36. Parasitic Resistance to Ground
C
C
X
X
GND
EXC
EXC
CIN
CIN
, to ground should not affect the CDC
X
should be isolated from
CDC
CDC
DATA
DATA