AD7153 Analog Devices, AD7153 Datasheet - Page 5

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AD7153

Manufacturer Part Number
AD7153
Description
12-Bit Capacitance-to-Digital Converter (1 Capacitance Input Channel)
Manufacturer
Analog Devices
Datasheet

Specifications of AD7153

Resolution (bits)
12bit
# Chan
1
Sample Rate
200SPS
Interface
I²C/Ser 2-Wire,Ser
Analog Input Type
Capacitive
Ain Range
±0.25 pF to ±2 pF Diff,0.5 pF to 4 pF SE
Adc Architecture
Sigma-Delta
Pkg Type
SOP

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TIMING SPECIFICATIONS
V
Table 2.
Parameter
SERIAL INTERFACE
1
2
Sample tested during initial release to ensure compliance.
All input signals are specified with input rise/fall times = 3 ns, measured between the 10% and 90% points. Timing reference points at 50% for inputs and outputs;
output load = 10 pF.
DD
SCL Frequency
SCL High Pulse Width, t
SCL Low Pulse Width, t
SCL, SDA Rise Time, t
SCL, SDA Fall Time, t
Hold Time (Start Condition), t
Set-Up Time (Start Condition), t
Data Set-Up Time, t
Setup Time (Stop Condition), t
Data Hold Time, t
Bus-Free Time (Between Stop and Start Conditions, t
= 2.7 V to 3.6 V; GND = 0 V; Input Logic 0 = 0 V; Input Logic 1 = V
SDA
SCL
1, 2
P
HD;DAT
t
BUF
SU;DAT
F
R
(Master)
LOW
S
HIGH
t
HD;STA
HD;STA
SU;STO
SU;STA
t
LOW
t
R
t
HD;DAT
Figure 3. Serial Interface Timing Diagram
BUF
t
HIGH
)
t
F
t
Rev. 0 | Page 5 of 24
SU;DAT
Min
0
0.6
1.3
0.6
0.6
0.1
0.6
0.01
1.3
Typ
DD
; −40°C to +85°C, unless otherwise noted.
Max
400
0.3
0.3
S
Unit
kHz
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
t
SU;STA
t
HD;STA
Test Conditions/Comments
See Figure 3.
After this period, the first clock is generated.
Relevant for repeated start condition.
t
SU;STO
AD7152/AD7153
P

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