AD7324 Analog Devices, AD7324 Datasheet - Page 9

• Manufacturer Part Number: AD7324
• Description: Software Selectable True Bipolar Input, 4-Channel, 12-Bit Plus Sign A/D Converter
• Manufacturer: Analog Devices

Specifications of AD7324

• Resolution (bits): 13bit
• # Chan: 4
• Sample Rate: 1MSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Bip,Diff-Uni,SE-Uni
• Ain Range: Bip (Vref),Bip (Vref) x 2,Bip (Vref) x 4,Bip 10V,Bip 2.5V,Bip 5.0V,Uni (Vref) x 4,Uni 10V
• Adc Architecture: SAR
• Pkg Type: SOP

PIN CONFIGURATION AND FUNCTION DESCRIPTION
Table 5. Pin Function Description
Pin No.
1
2
3, 15
4
5
6
7, 8, 10, 9
11
12
13
14
16
Mnemonic
CS
DIN
DGND
AGND
REFIN/OUT
V
V
V
V
V
DOUT
SCLK
SS
IN
DD
CC
DRIVE
0 to V
IN
3
Description
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on
the AD7324 and frames the serial data transfer.
Data In. Data should be written to the on-chip registers is provided on this input and is clocked into the
register on the falling edge of SCLK (see the Reference section).
Digital Ground. Ground reference point for all digital circuitry on the AD7324. The DGND and AGND
voltages ideally should be at the same potential and must not be more than 0.3 V apart, even on a
transient basis.
Analog Ground. Ground reference point for all analog circuitry on the AD7324. All analog input signals
and any external reference signal should be referred to this AGND voltage. The AGND and DGND
voltages ideally should be at the same potential and must not be more than 0.3 V apart, even on a
transient basis.
Reference Input/Reference Output. The on-chip reference is available on this pin for external use to the
AD7324. The nominal internal reference voltage is 2.5 V, which appears at the pin. A 680 nF capacitor
should be placed on the reference pin. Alternatively, the internal reference can be disabled, and an
external reference applied to this input. On power-up, the external reference mode is the default
condition (see the Reference section).
Negative Power Supply Voltage. This is the negative supply voltage for the analog input section.
Analog Input 0 to Analog Input 3. The analog inputs are multiplexed into the on-chip track-and-hold.
The analog input channel for conversion is selected by programming the channel address Bit ADD1
and Bit ADD0 in the control register. The inputs can be configured as four single-ended inputs, two true
differential input pairs, two pseudo differential inputs, or three pseudo differential inputs. The config-
uration of the analog inputs is selected by programming the mode bits, Bit Mode 1 and Bit Mode 0, in
the control register. The input range on each input channel is controlled by programming the range
register. Input ranges of ±10 V, ±5 V, ±2.5 V, and 0 V to +10 V can be selected on each analog input
channel when a +2.5 V reference voltage is used (see the Reference section).
Positive Power Supply Voltage. This is the positive supply voltage for the analog input section.
Analog Supply Voltage, 2.7 V to 5.25 V. This is the supply voltage for the ADC core on the AD7324.
This supply should be decoupled to AGND. Specifications apply from V
Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the interface
operates. This pin should be decoupled to DGND. The voltage at this pin may be different to that at V
but it should not exceed V
Serial Data Output. The conversion output data is supplied to this pin as a serial data stream. The bits
are clocked out on the falling edge of the SCLK input, and 16 SCLKs are required to access the data. The
data stream consists of a leading ZERO bit, two channel identification bits, the sign bit, and 12 bits of
conversion data. The data is provided MSB first (see the Serial Interface section).
Serial Clock, Logic Input. A serial clock input provides the SCLK used for accessing the data from the
AD7324. This clock is also used as the clock source for the conversion process.
REFIN/OUT
Figure 3. TSSOP Pin Configuration
DGND
AGND
V
V
DIN
V
CS
IN
IN
SS
0
1
Rev. A | Page 9 of 36
1
2
3
4
5
6
7
8
CC
by more than 0.3 V.
(Not to Scale)
TOP VIEW
AD7324
16
15
14
13
12
11
10
9
SCLK
DGND
DOUT
V
V
V
V
V
DRIVE
CC
DD
IN
IN
2
3
CC
= 4.75 V to 5.25 V.
AD7324
CC
,