AD7854 Analog Devices, AD7854 Datasheet - Page 14

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AD7854

Manufacturer Part Number
AD7854
Description
3 V to 5 V Single Supply, 200 kSPS, 12-Bit, Parallel Sampling ADC
Manufacturer
Analog Devices
Datasheet

Specifications of AD7854

Resolution (bits)
12bit
# Chan
1
Sample Rate
200kSPS
Interface
Byte,Par
Analog Input Type
Diff-Uni,SE-Uni
Ain Range
(Vref) p-p
Adc Architecture
SAR
Pkg Type
DIP,SOIC,SOP

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AD7854/AD7854L
ANALOG INPUT
The equivalent analog input circuit is shown in Figure 9. Dur-
ing the acquisition interval the switches are both in the track
position and the AIN(+) charges the 20 pF capacitor through
the 125 Ω resistance. On the rising edge of CONVST switches
SW1 and SW2 go into the hold position retaining charge on the
20 pF capacitor as a sample of the signal on AIN(+). The
AIN(–) is connected to the 20 pF capacitor, and this unbalances
the voltage at Node A at the input of the comparator. The
capacitor DAC adjusts during the remainder of the conversion
cycle to restore the voltage at Node A to the correct value. This
action transfers a charge, representing the analog input signal, to
the capacitor DAC which in turn forms a digital representation
of the analog input signal. The voltage on the AIN(–) pin directly
influences the charge transferred to the capacitor DAC at the
hold instant. If this voltage changes during the conversion period,
the DAC representation of the analog input voltage is altered.
Therefore it is most important that the voltage on the AIN(–)
pin remains constant during the conversion period. Further-
more, it is recommended that the AIN(–) pin is always connected
to AGND or to a fixed dc voltage.
Acquisition Time
The track-and-hold amplifier enters its tracking mode on the
falling edge of the BUSY signal. The time required for the
track-and-hold amplifier to acquire an input signal depends on
how quickly the 20 pF input capacitance is charged. There is a
minimum acquisition time of 400 ns. For large source imped-
ances, >2 kΩ, the acquisition time is calculated using the formula:
where R
125 Ω, 20 pF is the input R, C.
DC/AC Applications
For dc applications, high source impedances are acceptable,
provided there is enough acquisition time between conversions
to charge the 20 pF capacitor. For example with R
the required acquisition time is 922 ns.
For ac applications, removing high frequency components from
the analog input signal is recommended by use of an RC low-
pass filter on the AIN(+) pin, as shown in Figure 11. In applica-
tions where harmonic distortion and signal to noise ratio are
critical, the analog input should be driven from a low impedance
source. Large source impedances significantly affect the ac per-
formance of the ADC. They may require the use of an input
buffer amplifier. The choice of the amplifier is a function of the
particular application.
t
ACQ
AIN(+)
AIN(–)
AGND
= 9 × (R
IN
Figure 9. Analog Input Equivalent Circuit
is the source impedance of the input signal, and
125
125
IN
+ 125 Ω) × 20 pF
TRACK
HOLD
SW1
TRACK
NODE A
SW2
20pF
HOLD
COMPARATOR
CAPACITOR
IN
DAC
= 5 kΩ,
–14–
The maximum source impedance depends on the amount of
total harmonic distortion (THD) that can be tolerated. The
THD increases as the source impedance increases. Figure 10
shows a graph of the total harmonic distortion vs. analog input
signal frequency for different source impedances. With the
setup as in Figure 11, the THD is at the –90 dB level. With a
source impedance of 1 kΩ and no capacitor on the AIN(+) pin,
the THD increases with frequency.
In a single supply application (both 3 V and 5 V), the V+ and
V– of the op amp can be taken directly from the supplies to the
AD7854/AD7854L which eliminates the need for extra external
power supplies. When operating with rail-to-rail inputs and out-
puts at frequencies greater than 10 kHz, care must be taken in
selecting the particular op amp for the application. In particular,
for single supply applications the input amplifiers should be
connected in a gain of –1 arrangement to get the optimum per-
formance. Figure 11 shows the arrangement for a single supply
application with a 50 Ω and 10 nF low-pass filter (cutoff fre-
quency 320 kHz) on the AIN(+) pin. Note that the 10 nF is a
capacitor with good linearity to ensure good ac performance.
Recommended single supply op amps are the AD820 and the
AD820-3V.
(–V
REF
/2 TO +V
+3V TO +5V
V
Figure 10. THD vs. Analog Input Frequency
–72
–76
–80
–84
–88
–92
IN
0
V
REF
REF
Figure 11. Analog Input Buffering
THD VS. FREQUENCY FOR DIFFERENT
SOURCE IMPEDANCES
/2)
/2
10k
10k
10k
20
R
INPUT FREQUENCY – kHz
IN
IC1
= 1k
40
V+
V–
10k
AD820
AD820-3V
50
60
10 F
R
AS IN FIGURE 13
IN
10nF
(NPO)
= 50 , 10nF
0.1 F
80
TO AIN(+) OF
AD7854/AD7854L
100
REV. B

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