AD5755 Analog Devices, AD5755 Datasheet - Page 29

• Manufacturer Part Number: AD5755
• Description: Quad Channel, 16-Bit, Serial Input,
• Manufacturer: Analog Devices

Specifications of AD5755

• Resolution (bits): 16bit
• Dac Update Rate: 91kSPS
• Dac Settling Time: 11µs
• Max Pos Supply (v): +33V
• Single-supply: No
• Dac Type: I or V Out
• Dac Input Format: SPI

Data Sheet
THEORY OF OPERATION
The AD5755 is a quad, precision digital-to-current loop and
voltage output converter designed to meet the requirements of
industrial process control applications. It provides a high
precision, fully integrated, low cost, single-chip solution for
generating current loop and unipolar/bipolar voltage outputs.
The current ranges available are 0 mA to 20 mA, 0 mA to
24 mA, and 4 mA to 20 mA. The voltage ranges available are
0 V to 5 V, ±5 V, 0 V to 10 V, and ±10 V. The current and
voltage outputs are available on separate pins, and only one is
active at any one time. The desired output configuration is user
selectable via the DAC control register.
On-chip dynamic power control minimizes package power
dissipation in current mode.
DAC ARCHITECTURE
The DAC core architecture of the AD5755 consists of two
matched DAC sections. A simplified circuit diagram is shown
in Figure 70. The four MSBs of the 16-bit data-word are
decoded to drive 15 switches, E1 to E15. Each of these switches
connects one of 15 matched resistors to either ground or the
reference buffer output. The remaining 12 bits of the data-word
drive Switch S0 to Switch S11 of a 12-bit voltage mode R-2R
ladder network.
The voltage output from the DAC core is either converted to a
current (see Figure 72), which is then mirrored to the supply rail so
that the application simply sees a current source output, or it is
buffered and scaled to output a software selectable unipolar or
bipolar voltage range (see Figure 71). Both the voltage and
current outputs are supplied by V
voltage are output on separate pins and cannot be output
simultaneously. A channel’s current and voltage output pins can
be tied together.
DAC
2R
12-BIT R-2R LADDER
S0
2R
SCALING
RANGE
S1
2R
Figure 70. DAC Ladder Structure
Figure 71. Voltage Output
2R
S11
FOUR MSBs DECODED INTO
V
OUT_X
15 EQUAL SEGMENTS
BOOST_x
SHORT FAULT
2R
E1
. The current and
E2
2R
+V
V
–V
OUT_X
2R
E15
SENSE_X
SENSE_X
V
OUT
Rev. A | Page 29 of 52
Voltage Output Amplifier
The voltage output amplifier is capable of generating both
unipolar and bipolar output voltages. It is capable of driving a
load of 1 kΩ in parallel with 1 μF (with an external compen-
sation capacitor) to AGND. The source and sink capabilities of
the output amplifier are shown in Figure 22. The slew rate is
1.9 V/μs with a full-scale settling time of 16 μs (10 V step). If
remote sensing of the load is not required, connect +V
directly to V
+V
stay within ±3.0 V of AGND for correct operation.
Driving Large Capacitive Loads
The voltage output amplifier is capable of driving capacitive
loads of up to 2 μF with the addition of a 220 pF nonpolarized
compensation capacitor on each channel. Care should be taken
to choose an appropriate value of compensation capacitor. This
capacitor, while allowing the AD5755 to drive higher capacitive
loads and reduce overshoot, increases the settling time of the
part and, therefore, affects the bandwidth of the system. With-
out the compensation capacitor, up to 10 nF capacitive loads
can be driven. See Table 5 for information on connecting
compensation capacitors.
Reference Buffers
The AD5755 can operate with either an external or internal
reference. The reference input requires a 5 V reference for
specified performance. This input voltage is then buffered
before it is applied to the DAC.
POWER-ON STATE OF AD5755
On initial power-up of the AD5755, the power-on reset circuit
powers up in a state that is dependent on the power-on
condition (POC) pin.
If POC = 0, the voltage output and current output channels
power up in tristate mode.
If POC = 1, the voltage output channel powers up with a 30 kΩ
pull-down resistor to ground, and the current output channel
powers up to tristate.
SENSE_x
must stay within ±3.0 V of V
16-BIT
Figure 72. Voltage-to-Current Conversion Circuitry
DAC
OUT_x
and connect −V
A1
T1
R2
R
SENSE
SET
A2
OUT_x
directly to AGND.
V
T2
BOOST_x
, and
R3
I
OUT_x
−
V
SENSE_x
AD5755
SENSE_x
must