AD5628 Analog Devices, AD5628 Datasheet
AD5628
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AD5628 Summary of contents
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... The AD5628/AD5648/AD5668 devices are low power, octal, 12-/14-/16-bit, buffered voltage-output DACs. All devices operate from a single 2 5.5 V supply and are guaranteed monotonic by design. The AD5668 and AD5628 are available in both × LFCSP and a 16-lead TSSOP, while the AD5648 is available in both a 14-lead and 16-lead TSSOP. ...
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... Changes to Ordering Guide .......................................................... 28 1/11—Rev Rev. E Changes to AD5628 Relative Accuracy, Zero-Code Error, Offset Error, and Reference TC Parameters, Table 1............................... 3 Changes to AD5628 Relative Accuracy, Zero-Code Error, Offset Error, and Reference TC Parameters, Table 2............................... 5 Changes to Output Voltage Settling Time, Table 3 ...................... 6 Added Figure 53; Renumbered Sequentially .............................. 17 Change to Output Amplifier Section ...
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... 14.6 14.6 2.505 2.495 2.505 7.5 7.5 Rev Page AD5628/AD5648/AD5668 unless otherwise noted. MIN MAX Unit Conditions/Comments Bits LSB See Figure 9 LSB Guaranteed monotonic by design (see Figure 12) Bits LSB See Figure 8 LSB Guaranteed monotonic by design (see Figure 11) ...
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... Temperature range is −40°C to +105°C, typical at 25°C. 2 Linearity calculated using a reduced code range of AD5628 (Code 32 to Code 4064), AD5648 (Code 128 to Code 16,256), and AD5668 (Code 512 to 65,024). Output unloaded. 3 Guaranteed by design and characterization; not production tested. 4 Interface inactive ...
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... 14.6 14.6 1.253 1.247 1.253 7.5 7.5 Rev Page AD5628/AD5648/AD5668 unless otherwise noted. MIN MAX Unit Conditions/Comments Bits LSB See Figure 9 LSB Guaranteed monotonic by design (see Figure 12) Bits LSB See Figure 8 LSB Guaranteed monotonic by design (see Figure 11) ...
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... Temperature range is −40°C to +105°C, typical at 25°C. 2 Linearity calculated using a reduced code range of AD5628 (Code 32 to Code 4064), AD5648 (Code 128 to Code 16256), and AD5668 (Code 512 to 65024). Output unloaded. 3 Guaranteed by design and characterization; not production tested. 4 Interface inactive ...
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... CLR pulse width low ns min SCLK falling edge to LDAC falling edge ns typ CLR pulse activation time DB0 Figure 2. Serial Write Operation Rev Page AD5628/AD5648/AD5668 + V )/2. See Figure ...
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... AD5628/AD5648/AD5668 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 5. Parameter Rating V to GND −0 Digital Input Voltage to GND −0 GND −0 OUT GND −0 REFIN REFOUT Operating Temperature Range Industrial −40°C to +105°C Storage Temperature Range − ...
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... Analog Output Voltage from DAC D. The output amplifier has rail-to-rail operation. / The AD5628/AD5648/AD5668 have a common pin for reference input and reference output. When using the internal reference, this is the reference output pin. When using an external reference, this is the reference input pin. The default for this pin reference input ...
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... OUT The AD5628/AD5648/AD5668 have a common pin for reference input and reference output. When using the REFIN REFOUT internal reference, this is the reference output pin. When using an external reference, this is the reference input pin. The default for this pin reference input. ...
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... CODES Figure 8. INL AD5648—External Reference 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 500 1000 1500 2000 2500 CODES Figure 9. INL AD5628—External Reference 1 EXT REF = 5V 0 25°C A 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 50k 60k 65535 0 EXT REF = 5V 0 ...
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... CODES Figure 16. DNL AD5668-2/AD5668 EXT REF = 2. 25° 10k CODES Figure 17. DNL AD5648 INT REF = 2. 25° 500 1000 1500 2000 2500 3000 CODES Figure 18. DNL AD5628-2 60k 65535 15k 16383 3500 4095 ...
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... CODES Figure 20. INL AD5648-1 1 INT REF = 1.25V T = 25°C A 0.5 0 –0.5 –1.0 0 500 1000 1500 2000 2500 CODES Figure 21. INL AD5628-1 1 INT REF = 1.25V T = 25°C A 0.5 0 –0.5 –1.0 50k 60k 65535 0.5 0.4 0.3 0.2 0.1 –0.1 –0.2 –0.3 –0.4 –0.5 15k 16383 0 ...
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... AD5628/AD5648/AD5668 –0.05 –0.10 FULL-SCALE ERROR –0.15 –0.20 GAIN ERROR –0.25 –0.30 –40 –25 – TEMPERATURE (°C) Figure 25. Gain Error and Full-Scale Error vs. Temperature OFFSET ERROR 4 ZERO-SCALE ERROR –40 –25 – TEMPERATURE (°C) Figure 26. Zero-Scale Error and Offset Error vs. Temperature – ...
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... MIDSCALE 1.0 1/4 SCALE 0.5 ZERO SCALE 0 –0.5 –1.0 –0.03 –0.02 –0.01 0 CURRENT (A) Figure 33. AD5668-1 Source and Sink Capability FULL SCALE 0.01 0.02 0.03 0.01 0.02 0.03 Rev Page AD5628/AD5648/AD5668 1 25°C A 1.7 1 1.5 1 1.3 1.2 1.1 1.0 0.9 0.8 0 10k 20k 30k 40k DIGITAL CODES (Decimal) Figure 34. Supply Current vs. Code 2 ...
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... AD5628/AD5648/AD5668 2 25°C A 2.1 1.9 1 1.5 1.3 1 0.9 0.7 0 0.5 1.0 1.5 2.0 2.5 3.0 V (V) LOGIC Figure 37. Supply Current vs. Logic Input Voltage EXT REF = 25° – TIME (µs) Figure 38. Full-Scale Settling Time 5 5.0 EXT REF = 25°C A 4.5 4 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 –0.5 – ...
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... Figure 45. 0 Output Noise Plot, External Reference EXT REF = 25° Rev Page AD5628/AD5648/AD5668 0.20 EXT REF = 2.5V 0.15 0.10 0.05 0 –0.05 –0.10 –0.15 –0. TIME (s) Figure 46. 0 Output Noise Plot, External Reference 0.20 INT REF = 1.25V ...
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... AD5628/AD5648/AD5668 5.5V DD EXT REF = 25°C – ± 0.1V p-p REF FREQUENCY = 10kHz –40 –60 –80 –100 –120 –140 0 2000 4000 6000 FREQUENCY (Hz) Figure 49. Total Harmonic Distortion 25° EXTERNAL REFERENCE = EXTERNAL REFERENCE = ...
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... DAC register. Ideally, the output should The zero-code error is always positive in the AD5628/AD5648/AD5668, because the output of the DAC cannot go below due to a combination of the offset errors in the DAC and output amplifier. Zero-code error is expressed in millivolts ...
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... AD5628/AD5648/AD5668 DAC-to-DAC Crosstalk DAC-to-DAC crosstalk is the glitch impulse transferred to the output of one DAC due to a digital code change and subsequent output change of another DAC. This includes both digital and analog crosstalk measured by loading one of the DACs with a full-scale code change (all 0s to all 1s or vice versa) with LDAC low and monitoring the output of another DAC ...
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... The AD5628/AD5648/AD5668 have an on-chip reference with an internal gain of 2. The AD5628/AD5648/AD5668-1 have a 1. ppm/°C reference, giving a full-scale output of 2.5 V; the AD5628/AD5648/AD5668-2, -3 have a 2 ppm/°C reference, giving a full-scale output The on-board reference is off at power-up, allowing the use of an external reference ...
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... The write sequence begins by bringing the SYNC line low. Data from the DIN line is clocked into the 32-bit shift register on the falling edge of SCLK. The serial clock frequency can be as high as 50 MHz, making the AD5628/AD5648/AD5668 compatible nd with high speed DSPs. On the 32 ...
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... Table 9) and finally the 16-/14-/12-bit data-word. The data- word comprises the 16-/14-/12-bit input code followed by four, six, or eight don’t care bits for the AD5668, AD5648, and AD5628, respectively (see Figure 57 through Figure 59). These data bits are transferred to the DAC register on the 32 edge of SCLK. ...
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... LDAC low the value in the DAC register before powering down ( LDAC high). CLEAR CODE REGISTER The AD5628/AD5648/AD5668 have a hardware CLR pin that is an asynchronous clear input. The CLR input is falling edge sensitive. Bringing the CLR line low clears the contents of the ...
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... RESISTOR AMPLIFIER STRING DAC POWER-DOWN CIRCUITRY Figure 61. Output Stage During Power-Down DB24 DB23 DB22 Address bits (A3 to A0)—don’t cares Rev Page AD5628/AD5648/AD5668 DB21 DB20 DB19 to DB1 Don’t cares DB8 DB7 DB6 DB5 DB4 DB3 PD0 ...
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... This ground point should be as close as possible to the AD5628/AD5648/AD5668. The power supply to the AD5628/AD5648/AD5668 should be bypassed with 10 μF and 0.1 μF capacitors. The capacitors should physically be as close as possible to the device, with the 0.1 μF capacitor ideally right up against the device. The 10 μF capacitors are the tantalum bead type important that the 0.1 μ ...
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... Figure 62. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters 5.10 5.00 4. 4.50 6.40 4.40 BSC 4. PIN 1 1.20 MAX 0.20 0.09 8° 0.30 0.65 0° 0.19 SEATING BSC PLANE COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 63. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters Rev Page AD5628/AD5648/AD5668 0.75 0.60 0.45 0.75 0.60 0.45 ...
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... AD5628/AD5648/AD5668 PIN 1 INDICATOR 0.80 0.75 0.70 SEATING PLANE BALL A1 IDENTIFIER 0.650 0.595 0.540 SEATING PLANE 4.10 0.35 4.00 SQ 0.30 3.90 0.25 13 0.65 12 BSC EXPOSED PAD 9 8 0.45 TOP VIEW BOTTOM VIEW 0.40 0.35 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF COMPLIANT TO JEDEC STANDARDS MO-220-WGGC. Figure 64. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ × Body, Very Very Thin Quad ...
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... AD5628ARUZ-2 −40°C to +105°C AD5628ARUZ-2REEL7 −40°C to +105°C AD5628ACPZ-1-RL7 −40°C to +105°C AD5628ACPZ-2-RL7 −40°C to +105°C AD5628BCPZ-2-RL7 −40°C to +105°C AD5628BCBZ-1-RL7 −40°C to +105°C AD5648BRUZ-1 −40°C to +105°C AD5648BRUZ-1REEL7 − ...
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... AD5628/AD5648/AD5668 NOTES Rev Page Data Sheet ...
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... Data Sheet NOTES AD5628/AD5648/AD5668 Rev Page ...
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... AD5628/AD5648/AD5668 NOTES ©2005–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05302-0-8/11(F) Rev Page Data Sheet ...