AD5305 Analog Devices, AD5305 Datasheet - Page 15

• Manufacturer Part Number: AD5305
• Manufacturer: Analog Devices

Specifications of AD5305

• Resolution (bits): 8bit
• Dac Update Rate: 167kSPS
• Dac Settling Time: 6µs
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Voltage Out
• Dac Input Format: I2C/Ser 2-wire,Ser

FUNCTIONAL DESCRIPTION
The AD5305/AD5315/AD5325 are quad resistor-string DACs
fabricated on a CMOS process with resolutions of 8, 10, and 12
bits, respectively. Each contains four output buffer amplifiers
and is written to via a 2-wire serial interface. They operate from
single supplies of 2.5 V to 5.5 V, and the output buffer amplifiers
provide rail-to-rail output swing with a slew rate of 0.7 V/μs.
The four DACs share a single reference input pin. The devices
have three programmable power-down modes, in which all
DACs can be turned off completely with a high impedance
output, or the outputs can be pulled low by on-chip resistors.
DIGITAL-TO-ANALOG SECTION
The architecture of one DAC channel consists of a resistor-
string DAC followed by an output buffer amplifier. The voltage
at the REFIN pin provides the reference voltage for the DAC.
Figure 29 shows a block diagram of the DAC architecture.
Because the input coding to the DAC is straight binary, the ideal
output voltage is given by
where:
D = decimal equivalent of the binary code, which is loaded to
the DAC register:
N = DAC resolution
RESISTOR STRING
The resistor string section is shown in Figure 30. It is simply a
string of resistors, each of value R. The digital code loaded to
the DAC register determines at what node on the string the
voltage is tapped off to be fed into the output amplifier. The
voltage is tapped off by closing one of the switches connecting
the string to the amplifier. Because it is a string of resistors, it is
guaranteed monotonic.
REGISTER
0 to 255 for AD5305 (8 bits)
0 to 1023 for AD5315 (10 bits)
0 to 4095 for AD5325 (12 bits)
INPUT
V
OUT
=
V
REF
REGISTER
2
Figure 29. DAC Channel Architecture
N
DAC
×
D
RESISTOR
STRING
REFIN
OUTPUT BUFFER
AMPLIFIER
V
OUT
Rev. G | Page 15 of 24
A
DAC REFERENCE INPUTS
There is a single reference input pin for the four DACs. The
reference input is unbuffered. The user can have a reference
voltage as low as 0.25 V and as high as V
restriction due to headroom and footroom of any reference
amplifier.
It is recommended to use a buffered reference in the external
circuit (for example, REF192). The input impedance is typically
45 kΩ.
OUTPUT AMPLIFIER
The output buffer amplifier is capable of generating rail-to-rail
voltages on its output, which gives an output range of 0 V to
V
2 kΩ to GND or V
The source and sink capabilities of the output amplifier can be
seen in the plot in Figure 14.
The slew rate is 0.7 V/μs with a half-scale settling time to
±0.5 LSB (at eight bits) of 6 μs.
POWER-ON RESET
The AD5305/AD5315/AD5325 are provided with a power-on
reset function, so that they power up in a defined state. The
power-on state is
•
•
Both input and DAC registers are filled with zeros and remain
so until a valid write sequence is made to the device. This is
particularly useful in applications where it is important to know
the state of the DAC outputs while the device is powering up.
DD
when the reference is V
Normal operation
Output voltage set to 0 V
R
R
R
R
R
DD
, in parallel with 500 pF to GND or V
Figure 30. Resistor String
AD5305/AD5315/AD5325
DD
. It is capable of driving a load of
TO OUTPUT
AMPLIFIER
DD
because there is no
DD
.