AD9752 Analog Devices, AD9752 Datasheet - Page 9

• Manufacturer Part Number: AD9752
• Manufacturer: Analog Devices

Specifications of AD9752

• Resolution (bits): 12bit
• Dac Update Rate: 125MSPS
• Dac Settling Time: 35ns
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Par

FUNCTIONAL DESCRIPTION
Figure 17 shows a simplified block diagram of the AD9752.
The AD9752 consists of a large PMOS current source array that
is capable of providing up to 20 mA of total current. The array
is divided into 31 equal currents that make up the five most
significant bits (MSBs). The next four bits or middle bits consist
of 15 equal current sources whose value is 1/16th of an MSB
current source. The remaining LSBs are binary weighted frac-
tions of the middle-bits current sources. Implementing the
middle and lower bits with current sources, instead of an R-2R
ladder, enhances its dynamic performance for multitone or low
amplitude signals and helps maintain the DAC’s high output
impedance (i.e., >100 k ).
All of these current sources are switched to one or the other of
the two output nodes (i.e., IOUTA or IOUTB) via PMOS
differential current switches. The switches are based on a new
architecture that drastically improves distortion performance.
This new switch architecture reduces various timing errors and
provides matching complementary drive signals to the inputs of
the differential current switches.
The analog and digital sections of the AD9752 have separate
power supply inputs (i.e., AVDD and DVDD). The digital
section, which is capable of operating up to a 125 MSPS clock
rate and over a +2.7 V to +5.5 V operating range, consists of
edge-triggered latches and segment decoding logic circuitry.
The analog section, which can operate over a +4.5 V to +5.5 V
range, includes the PMOS current sources, the associated differ-
ential switches, a 1.20 V bandgap voltage reference and a refer-
ence control amplifier.
The full-scale output current is regulated by the reference con-
trol amplifier and can be set from 2 mA to 20 mA via an exter-
nal resistor, R
both the reference control amplifier and voltage reference V
sets the reference current I
segmented current sources with the proper scaling factor. The
full-scale current, I
DAC TRANSFER FUNCTION
The AD9752 provides complementary current outputs, IOUTA
and IOUTB. IOUTA will provide a near full-scale current output,
I
IOUTB, the complementary output, provides no current. The
current output appearing at IOUTA and IOUTB is a function
of both the input code and I
REV. 0
OUTFS
IOUTA = (DAC CODE/4096)
, when all bits are high (i.e., DAC CODE = 4095) while
SET
0.1 F
. The external resistor, in combination with
OUTFS
CLOCK
, is thirty-two times the value of I
V
REFIO
R
2k
SET
REF
OUTFS
, which is mirrored over to the
I
+5V
REF
and can be expressed as:
I
OUTFS
CLOCK
REFIO
FS ADJ
DVDD
DCOM
SLEEP
+1.20V REF
REFLO
Figure 17. Functional Block Diagram
SEGMENTED SWITCHES
FOR DB11–DB3
DIGITAL DATA INPUTS (DB11–DB0)
REF
150pF
REFIO
.
LATCHES
(1)
,
CURRENT SOURCE
–9–
ARRAY
PMOS
where DAC CODE = 0 to 4095 (i.e., Decimal Representation).
As mentioned previously, I
current I
V
where I
The two current outputs will typically drive a resistive load
directly or via a transformer. If dc coupling is required, IOUTA
and IOUTB should be directly connected to matching resistive
loads, R
R
IOUTA or IOUTB as would be the case in a doubly terminated
50
at the IOUTA and IOUTB nodes is simply :
Note the full-scale value of V
the specified output compliance range to maintain specified
distortion and linearity performance.
The differential voltage, V
IOUTB is:
Substituting the values of I
expressed as:
These last two equations highlight some of the advantages of
operating the AD9752 differentially. First, the differential op-
eration will help cancel common-mode error sources associated
with I
Second, the differential code dependent current and subsequent
voltage, V
output (i.e., V
power to the load.
Note, the gain drift temperature performance for a single-ended
(V
can be enhanced by selecting temperature tracking resistors for
R
in Equation 8.
+5V
REFIO
LOAD
LOAD
V
V
SWITCHES
OUTA
AVDD
OUTA
OUTB
IOUTB = (4095 – DAC CODE)/4096
I
V
V
(32 R
LSB
OUTFS
or 75
OUTA
DIFF
DIFF
may represent the equivalent load resistance seen by
and R
and external resistor R
REF
and V
LOAD
= IOUTA
= IOUTB
REF
DIFF
LOAD
AD9752
= (IOUTA – IOUTB)
= {(2 DAC CODE – 4095)/4096}
= V
and I
= 32
ACOM
, which is nominally set by a reference voltage
, which are tied to analog common, ACOM. Note,
SET
cable. The single-ended voltage output appearing
, is twice the value of the single-ended voltage
OUTB
OUTA
ICOMP
/R
IOUTA
IOUTB
REFIO
OUTB
due to their ratiometric relationship as shown
SET
I
) or differential output (V
REF
or V
/R
)
0.1 F
R
R
such as noise, distortion and dc offsets.
SET
I
OUTB
LOAD
LOAD
V
OUTB
REFIO
DIFF
OUTFS
OUTA
I
OUTA
), thus providing twice the signal
OUTA
SET
, appearing across IOUTA and
V
, I
DIFF
V
R
50
. It can be expressed as:
is a function of the reference
OUTB
LOAD
OUTB
and V
R
= V
LOAD
OUTA
, and I
OUTB
– V
V
R
50
OUTB
DIFF
OUTA
LOAD
I
REF
OUTFS
should not exceed
) of the AD9752
AD9752
; V
DIFF
can be
(2)
(3)
(4)
(5)
(6)
(7)
(8)