AD768 Analog Devices, AD768 Datasheet - Page 11

• Manufacturer Part Number: AD768
• Description: 16-Bit, 30 MSPS D/A Converter
• Manufacturer: Analog Devices

Specifications of AD768

• Resolution (bits): 16bit
• Dac Update Rate: 30MSPS
• Dac Settling Time: 25ns
• Max Pos Supply (v): +5.25V
• Single-supply: No
• Dac Type: Current Out
• Dac Input Format: Par

REV. B
For the values given in Figure 24, I
in a nominal unipolar output swing of 0 V to 2 V. Note, since
A1 has an inverting gain of approximately –4 and a noise gain of
+5, A1’s distortion and noise performance should be considered.
Figure 24. 0 V to 2 V Buffered Unipolar Output Using a
Current Divider
Bipolar Configuration
Bipolar mode is accomplished by providing an offset current,
I
ting I
through R
about the summing junction voltage, typically ground. Figure 25
shows the implementation for a bipolar 2.5 V buffered voltage
output. The resistor divider sets the full-scale current for I
5 mA. The internal 2.5 V reference generates a 2.5 mA I
current across R
the DAC is set to half scale (100. . .0) such that the 2.5 mA cur-
rent, I
from zero to full-scale, the output voltage swings from –2.5 V to
+2.5 V. Note, in configurations that require more than 15 mA
of total current from REFOUT, an external buffer is required.
Op amps such as the AD811, AD8001, and AD9631 are good
selections for superior dynamic performance. In dc applications,
op amps such as the AD845 or AD797 may be more appropriate.
DIFFERENTIAL OUTPUT CONFIGURATIONS
AC Coupling via a Transformer
Applications that do not require baseband operation typically
use transformer coupling. Transformer coupling the comple-
mentary outputs of the AD768 to a load has the inherent benefit
of providing electrical isolation while consuming no additional
power. Also, a properly applied transformer should not degrade
the AD768’s output signal with respect to noise and distortion,
since the transformer is a passive device. Figure 26 shows a
center-tapped output transformer that provides the necessary dc
load conditions at the outputs IOUTA and IOUTB to drive a
ter-tapped transformer has an impedance ratio of 4 that corre-
sponds to a turns ratio of 2. Hence, any load, R
BIPOLAR
0.5 V signal into a 50
Figure 25. Bipolar 2.5 V Buffered Voltage Output
BIPOLAR
DAC
, to the I/V amplifier’s (A1) summing junction. By set-
, is exactly offset by I
FB
AD768
AD768
LADCOM
LADCOM
, the resulting output voltage will be symmetrical
REFOUT
to exactly half the full-scale current flowing
IOUTA
IOUTA
IOUTB
IOUTB
BIP
. An output voltage of 0 V is produced when
27
28
27
28
3
1
1
I
1
R
20
R
20
P
P
load. In this particular circuit, the cen-
C
I
2
R
1k
BIP
24.9
BIPOLAR
R
24.9
75
I
L
3
I
3
BIPOLAR
equals 4 mA, which results
100
R
I
. As the DAC is varied
DAC
FF
500
A1
R
FB
A1
L
R
1k
, referred to the
FB
BIPOLAR
DAC
to
–11–
primary side is multiplied by a factor of 4 (i.e., in this case
200 ). To avoid dc current from flowing into the R-2R ladder
of the DAC, the center tap of the transformer should be con-
nected to LADCOM.
In order to comply with the minimum voltage compliance of
–1.2 V, the maximum differential resistance seen between
IOUTA and IOUTB should not exceed 240 . Note that the
differential resistance consists of the load R
primary side of the transformer in parallel with any added differ-
ential resistance, R
added to the primary side of the transformer to match the effec-
tive primary source impedance to the load (i.e., in this case
200 ).
DC COUPLING VIA AN AMPLIFIER
A dc differential to single-ended conversion can be easily ac-
complished using the circuit shown in Figure 27. This circuit
will attenuate both ac and dc common-mode error sources due
to the differential nature of the circuit. Thus, common-mode
noise (i.e., clock feedthrough) as well as dc unipolar offset errors
will be significantly reduced. Also, excellent temperature stabil-
ity can be obtained by using temperature tracking, thin film
resistors for R and R
provided such that the voltage output swing and IREF can be
optimized for a given application.
POWER AND GROUNDING CONSIDERATIONS
In systems seeking to simultaneously achieve high speed and
high accuracy, the implementation and construction of the
printed circuit board design is often as important as the circuit
design. Proper RF techniques must be used in device selection,
placement and routing, and supply bypassing and grounding.
Maintaining low noise on power supplies and ground is critical
to obtaining optimum results from the AD768. Figure 28 pro-
vides an illustration of the recommended printed circuit board
ground plane layout which is implemented on the AD768 evalu-
ation board.
Figure 27. DC Differential to Single-Ended Conversion
Figure 26. Differential Output Using a Transformer
AD768
LADCOM
REFOUT
AD768
IOUTA
IOUTB
REFIN
LADCOM
IOUTA
IOUTB
27
28
1
6
3
DIFF
27
28
1
REF
R
, across the two outputs. R
REF
. The design equations for the circuit are
R*
*
R
200
DIFF
I
A1
REF
R*
4:1 IMPEDANCE
RATIO
T1 = MINI-CIRCUITS T4-6T
V
OUT
T1
V
WHERE I
*OHMTEK TDP-1403
L
OUT
, referred to the
V
R = 200
R
OUT
REF
= 4 I
= 5 x 200
REF
DIFF
AD768
2V
R
50
REF
L
=
2.5V
R
R
REF
is typically