AD768 Analog Devices, AD768 Datasheet - Page 14

• Manufacturer Part Number: AD768
• Description: 16-Bit, 30 MSPS D/A Converter
• Manufacturer: Analog Devices

Specifications of AD768

• Resolution (bits): 16bit
• Dac Update Rate: 30MSPS
• Dac Settling Time: 25ns
• Max Pos Supply (v): +5.25V
• Single-supply: No
• Dac Type: Current Out
• Dac Input Format: Par

AD768
AD768 IN MULTITONE TRANSMITTERS (FOR ADSL)
Communications applications frequently require aspects of
component performance that differ significantly from the
simple, single tone signals used in typical SNR and THD tests.
This is particularly true for spread-spectrum and frequency divi-
sion multiplexed (FDM) type signals, where information con-
tent is held in a number of small signal components spread
across the frequency band. In these applications, a combination
of wide dynamic range, good fine-scale linearity, and low inter-
modulation distortion is required. Unfortunately, a part’s full
scale SNR and THD performance may not be a reliable indica-
tor of how it will perform in these multitone applications.
One example of an FDM communications system is the DMT
(discrete multitone) ADSL (Asymmetrical Digital Subscriber
Line) standard currently being considered by ANSI. Figure 33
shows a block diagram of a transmitter function.
The digital bits are used to QAM modulate each of approxi-
mately 200 discrete tones. An inverse FFT turns this modu-
lated frequency domain information into 512 time points at a
2.2 MSPS sample rate. These time points are then put through
an FIR interpolation filter to upsample (in this case to 4.4 MSPS).
The bit stream is run through the AD768, which is followed by
a 4th order analog smoothing filter, then run to the line-driving
circuitry
Figure 34a shows a frequency domain representation of a test
vector run through this system, while 34b shows the time do-
main representation. (Clearly the frequency domain picture is
more informative.) We wish to optimize the SINAD of each
4 kHz frequency band: this is a function of both noise
(wideband and quantization) and distortion (simple harmonic
and intermod).
STREAM
BIT
Figure 34a. Output Spectrum of ADSL Test Vector
Figure 33. Typical DMT ADSL Transmit Chain
–20
–40
–60
–80
ENCODER
0
+BUFFER
QAM
AD768
0
MODULATED
FREQUENCY
BINS
256
SMOOTHING
INVERSE
4TH ORDER
FREQUENCY – Hz
FILTER
FFT
@ 2.2MSPS
512 TIME
POINTS
INTERPOLATOR
TO
TRANSMITTER
FIR
2X
1.1M
@ 4.4MSPS
1024 TIME
POINTS
–14–
Table I and II show the available SNR and THD at the output
of the filter vs. frequency bin for the ADSL application. The
AD768’s combination of 16-bit dynamic range and 14-bit lin-
earity provides excellent performance for the DMT signal. Its
fast input rate would support even faster rates of oversampling,
if one were interested in trading off digital filter complexity in
the interpolator for a simplified analog filter.
Figure 34b. Time Domain Output Signal of ADSL Test
Vector
–0.5
–1.0
–1.5
1.5
1.0
0.5
0
Frequency
160 kHz
418 kHz
640 kHz
893 kHz
Frequency
151 kHz
349 kHz
500 kHz
1 MHz
Table II. THD vs. Frequency
Table I. SNR vs. Frequency
TIME – 25µs/DIV
THD
–68.9 dBc
–64.0 dBc
–64.3 dBc
–63.8 dBc
SNR
70.1 dB
69.7 dB
69.4 dB
69.8 dB
REV. B