LPC1227FBD64 NXP Semiconductors, LPC1227FBD64 Datasheet - Page 17

The LPC1227FBD64 is an ARM Cortex-M0 based microcontroller for embedded applications featuring a high level of integration and low power consumption

LPC1227FBD64

Manufacturer Part Number
LPC1227FBD64
Description
The LPC1227FBD64 is an ARM Cortex-M0 based microcontroller for embedded applications featuring a high level of integration and low power consumption
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
LPC122X
Product data sheet
Fig 4.
0 GB
4 GB
1 GB
LPC122x memory map
7.5.1 Features
7.5 Nested Vectored Interrupt Controller (NVIC)
128 kB on-chip flash (LPC1227/301)
32 kB on-chip flash (LPC1224/101)
96 kB on-chip flash (LPC1226/301)
80 kB on-chip flash (LPC1225/321)
64 kB on-chip flash (LPC1225/301)
48 kB on-chip flash (LPC1224/121)
8 kB SRAM (LPC1225/6/7)
4 kB SRAM (LPC1224)
16 kB NXP library ROM
private peripheral bus
The Nested Vectored Interrupt Controller (NVIC) is an integral part of the Cortex-M0. The
tight coupling to the CPU allows for low interrupt latency and efficient processing of late
arriving interrupts.
8 kB custom ROM
AHB peripherals
APB peripherals
8 kB boot ROM
LPC122x
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
Controls system exceptions and peripheral interrupts.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 26 August 2011
0xFFFF FFFF
0xE010 0000
0xE000 0000
0x5008 0000
0x5000 0000
0x4008 0000
0x4000 0000
0x1FFF 2000
0x1FFF 0000
0x1FFE 2000
0x1FFE 0000
0x1FFC 4000
0x1FFC 0000
0x1000 2000
0x1000 1000
0x1000 0000
0x0002 0000
0x0001 8000
0x0001 4000
0x0001 0000
0x0000 C000
0x0000 8000
0x0000 0000
active interrupt vectors
32-bit ARM Cortex-M0 microcontroller
7
2
1
21
20
19
18
17
16
15
14
8
7
6
5
4
3
2
1
0
0
32-bit counter/timer 1
32-bit counter/timer 0
16-bit counter/timer 1
16-bit counter/timer 0
micro DMA registers
AHB peripherals
3 - 6 reserved
APB peripherals
22 - 31 reserved
comparator 0/1
9 - 13 reserved
system control
GPIO PIO2
GPIO PIO1
GPIO PIO0
IOCONFIG
reserved
I
UART1
UART0
2
CRC
ADC
PMU
WDT
RTC
SSP
0x0000 00C0
0x0000 0000
C-bus
LPC122x
© NXP B.V. 2011. All rights reserved.
0x4008 0000
0x4005 8000
0x4005 4000
0x4005 0000
0x4004 C000
0x4004 8000
0x4004 4000
0x4004 0000
0x4003 C000
0x4003 8000
0x4002 4000
0x4002 0000
0x4001 C000
0x4001 8000
0x4001 4000
0x4001 0000
0x4000 C000
0x4000 8000
0x4000 4000
0x4000 0000
0x5008 0000
0x5007 0000
0x5003 0000
0x5002 0000
0x5001 0000
0x5000 0000
002aaf270
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