LH79520_N NXP Semiconductors, LH79520_N Datasheet - Page 29

The LH79520, powered by an ARM720T, is a completeSystem-on-Chip with a high level of integration tosatisfy a wide range of requirements and expectations

LH79520_N

Manufacturer Part Number
LH79520_N
Description
The LH79520, powered by an ARM720T, is a completeSystem-on-Chip with a high level of integration tosatisfy a wide range of requirements and expectations
Manufacturer
NXP Semiconductors
Datasheet

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System-on-Chip
AC Specifications (Industrial)
Preliminary data sheet
D[31:0]
nCS6 - nCS0 Output 30 pF
nBLE[3:0]
nWE
nOE
nWAIT
A[25:0]
D[31:0]
nCAS
nRAS
nSDWE
SDCKE
DQM[3:0]
SIGNAL
Output 50 pF
Output 30 pF
Output 30 pF
Output 30 pF
Output 50 pF
Output 50 pF
Output 50 pF
Output 30 pF
Output 30 pF
Output 30 pF
TYPE LOAD DRIVE
Ouput 50 pF
Input
Input
Input
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
Table 11. AC Signal Characteristics (Industrial)
ASYNCHRONOUS MEMORY INTERFACE SIGNALS
SYNCHRONOUS MEMORY INTERFACE SIGNALS
SYMBOL
tOHSDW
tOHBEW
tOVSDW
tOHBER
tISWAIT
tOVWE
tOHWE
tOHCS
tOVOE
tOHOE
tOHCA
tOHRA
tOVDQ
tOHDQ
tOVCS
tOVBE
tOVCA
tOVRA
tOVC0
tOHC0
tOHD
tOHD
tOVD
tOVA
tOVD
tIDD
tISD
tIDD
Rev. 01 — 16 July 2007
NXP Semiconductors
3 × tHCLK – 6 ns
3 × tHCLK – 6 ns
2 × tHCLK – 6 ns
3 × tHCLK – 6 ns
2 × tHCLK – 6 ns 2 × tHCLK - 6 ns
3 × tHCLK – 6 ns
1.2 ns
1.5 ns
MIN.
5 ns
2 ns
2 ns
2 ns
2 ns
2 ns
2 × tHCLK – 18 ns
2 × tHCLK – 18 ns
2 × tHCLK – 18 ns
tHCLK + 6.5 ns
tHCLK + 10 ns
tHCLK + 10 ns
tHCLK + 10 ns
tHCLK + 6 ns
+ (nWAIT –1)
× tHCLK
10.5 ns
11.5 ns
MAX.
11 ns
11 ns
11 ns
11 ns
11 ns
Data Output Valid, following
Address Valid
Data Output Invalid, following
Address Valid
Data Input Valid, following
Address Valid (1 WAIT state)
Data Input Valid, following
Address Valid (nWAIT states)
Chip Select Output Valid,
following Address Valid
Chip Select Output Invalid,
following Address Valid
Byte Lane Enable Valid,
following Address Valid
Byte Lane Enable Invalid, follow-
ing Address Valid; Write Cycle
Byte Lane Enable Invalid, follow-
ing Address Valid; Read Cycle
Write Enable Valid, following
Address Valid
Write Enable Invalid, following
Address Valid
Ouput Enable Valid, following
Address Valid
Ouput Enable Invalid, following
Address Valid
WAIT Input Valid, following
Address Valid
Address Valid
Output Data Valid
Output Data Hold
Input Data Setup
Input Data Hold
CAS Valid
CAS Hold
RAS Valid
RAS Hold
SDWE Write Enable Valid
SDWE Write Enable Hold
SDCKE Clock Enable Valid
SDCKE Clock Enable Hold
DQM Data Mask Valid
DQM Data Mask Hold
DESCRIPTION
LH79520
29

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