LH79520_N NXP Semiconductors, LH79520_N Datasheet - Page 5

• Manufacturer Part Number: LH79520_N
• Description: The LH79520, powered by an ARM720T, is a completeSystem-on-Chip with a high level of integration tosatisfy a wide range of requirements and expectations
• Manufacturer: NXP Semiconductors

System-on-Chip
SIGNAL DESCRIPTIONS
Preliminary data sheet
PIN NO.
14-17
19-22
24-27
29-32
50-54
56-63
65-66
67-69
71-74
76-79
81-84
86-87
9-12
101
109
110
111
112
102
104
105
107
108
106
144
148
147
146
157
145
144
2-7
41
42
43
44
46
47
48
38
34
35
36
37
39
A[25:0]
D[31:0]
SDCLK
DQM3
DQM2
DQM1
DQM0
SDCKE
nDCS1
nDCS0
nRAS
nCAS
nSDWE
nCS6
nCS5
nCS4
nCS3
nCS2
nCS1
nCS0
nOE
nBLE3
nBLE2
nBLE1
nBLE0
nWE
nWAIT
DEOT0
nDACK0
DREQ0
DEOT1
DACK1
DREQ1
SIGNAL NAME
Input/Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
TYPE
Input
Input
Input
Table 2. LH79520 Signal Descriptions
Address Signals
Data Input/Output Signals
SDRAM Clock
Data Mask Output to SDRAMs
Data Mask Output to SDRAMs
Data Mask Output to SDRAMs
Data Mask Output to SDRAMs
SDRAM Clock Enable
SDRAM Chip Select
SDRAM Chip Select
Row Address Strobe
Column Address Strobe
SDRAM Write Enable
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Static Memory Controller Output Enable
Static Memory Controller Byte Lane Enable / Byte Write Enable
Static Memory Controller Byte Lane Enable / Byte Write Enable
Static Memory Controller Byte Lane Enable / Byte Write Enable
Static Memory Controller Byte Lane Enable / Byte Write Enable
Static Memory Controller Write Enable
Static Memory Controller External Wait Control
DMA 0 End of Transfer
DMA 0 Acknowledge
DMA 0 Request
DMA 1 End of Transfer
DMA 1 Acknowledge
DMA 1 Request
DMA CONTROLLER (DMAC)
MEMORY INTERFACE (MI)
Rev. 01 — 16 July 2007
NXP Semiconductors
DESCRIPTION
LH79520
NOTES
1, 3
1, 3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
5