LH79524_LH79525_N NXP Semiconductors, LH79524_LH79525_N Datasheet - Page 51
LH79524_LH79525_N
Manufacturer Part Number
LH79524_LH79525_N
Description
The LH79524/LH79525, powered by an ARM720T,is a complete System-on-Chip with a high level of integrationto satisfy a wide range of requirements andapplications
Manufacturer
NXP Semiconductors
Datasheet
1.LH79524_LH79525_N.pdf
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System-on-Chip
Preliminary data sheet
NOTE: LCDDCLK can range from 4.5 MHz to 6.8 MHz.
NOTE:
SYNCHRONIZATION)
*
SYNCHRONIZATION
(LCD VIDEO DATA)
*
(INTERNAL)
APBPERIPHCLKCTRL1:LCD
CLKPRESCALE:LCDPS
(SHOWN FOR REFERENCE)
Source is RCPC.
CLCDCLK
(HORIZONTAL
LCDEN
(INTERNAL DATA ENABLE)
(VERTICAL
LCDVD[11:0]
LCDSPS
LCDVD[11:0] (LH79525)
LCDVD[15:0] (LH79524)
16 × (TIMING0:PPL+1)
PULSE)
LCDVD[11:0] (LH79525)
LCDVD[15:0] (LH79524)
(DELAYED FOR
AD-TFT, HR-TFT)
LCDLP
LCDSPL
(AD-TFT, HR-TFT
START PULSE LEFT)
LCDLP
(HORIZONTAL
SYNCHRONIZATION
PULSE)
LCDLP
(HORIZONTAL
SYNCHRONIZATION
PULSE)
LCDDCLK
(DELAYED FOR
AD-TFT, HR-TFT)
LCDDCLK
(PANEL CLOCK)
TIMING2:PCD
TIMING2:BCD
TIMING2:IPC
TIMING2:CPL
LCDREV
LCDCLS
LCDPS
1.5 µs - 4 µs
Figure 32. AD-TFT, HR-TFT Horizontal Timing
AD-TFT and HR-TFT SIGNALS ARE TFT SIGNALS, RE-TIMED
TIMING1:VSW
Figure 33. AD-TFT, HR-TFT Vertical Timing
TIMING0:HSW
ALITIMING1:PSCLS
ALITIMING1:LPDEL
TIMING0:HSW +
ALITIMING2:SPLDEL
TIMING0: HBP
NXP Semiconductors
Rev. 01 — 16 July 2007
1 LCDDCLK
1 LCDDCLK
001
002 003 004 005 006 007 008
1 AD-TFT or HR-TFT HORIZONTAL LINE
001
ALITIMING2:PS2CLS2
002 003 004 005 006
PIXEL DATA
320
317
318
319 320
LH79524/LH79525
LH79525-42
LH79525-43
51
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