LPC2921_23_25 NXP Semiconductors, LPC2921_23_25 Datasheet - Page 36

• Manufacturer Part Number: LPC2921_23_25
• Description: The LPC2921/2923/2925 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, Full-speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2921_23_25_3
Product data sheet
6.14.4.3 Clock description
6.14.5.1 Functional description
6.14.5 Pulse Width Modulator (PWM)
The ADC modules are clocked from two different sources; CLK_MSCSS_ADCx_APB and
CLK_ADCx (x = 1 or 2), see
and CLK_MSCSS_ADCx_APB branch clocks for power management. If an ADC is
unused both its CLK_MSCSS_ADCx_APB and CLK_ADCx can be switched off.
The frequency of all the CLK_MSCSS_ADCx_APB clocks is identical to
CLK_MSCSS_APB since they are derived from the same base clock
BASE_MSCSS_CLK. Likewise the frequency of all the CLK_ADCx clocks is identical
since they are derived from the same base clock BASE_ADC_CLK.
The register interface towards the system bus is clocked by CLK_MSCSS_ADCx_APB.
Control logic for the analog section of the ADC is clocked by CLK_ADCx, see also
Figure
The MSCSS in the LPC2921/2923/2925 includes four PWM modules with the following
features.
The ability to provide flexible waveforms allows PWM blocks to be used in multiple
applications; e.g. dimmer/lamp control and fan control. Pulse width modulation is the
preferred method for regulating power since no additional heat is generated, and it is
energy-efficient when compared with linear-regulating voltage control networks.
The PWM delivers the waveforms/pulses of the desired duty cycles and cycle periods. A
very basic application of these pulses can be in controlling the amount of power
transferred to a load. Since the duty cycle of the pulses can be controlled, the desired
amount of power can be transferred for a controlled duration. Two examples of such
applications are:
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Six pulse width modulated output signals
Double edge features (rising and falling edges programmed individually)
Optional interrupt generation on match (each edge)
Different operation modes: continuous or run-once
16-bit PWM counter and 16-bit prescale counter allow a large range of PWM periods
A protective mode (TRAP) holding the output in a software-controllable state and with
optional interrupt generation on a trap event
Three capture registers and capture trigger pins with optional interrupt generation on
a capture event
Interrupt generation on match event, capture event, PWM counter overflow or trap
event
A burst mode mixing the external carrier signal with internally generated PWM
Programmable sync-delay output to trigger other PWM modules (master/slave
behavior)
Dimmer controller: The flexibility of providing waves of a desired duty cycle and cycle
period allows the PWM to control the amount of power to be transferred to the load.
The PWM functions as a dimmer controller in this application.
6.
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 14 April 2010
Section
6.7.2. Note that each ADC has its own CLK_ADCx
ARM9 microcontroller with CAN, LIN, and USB
LPC2921/2923/2925
© NXP B.V. 2010. All rights reserved.
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