P89LPC930_931 NXP Semiconductors, P89LPC930_931 Datasheet - Page 7
![The P89LPC930/931 are single-chip microcontrollers designed for applicationsdemanding high-integration, low cost solutions over a wide range of performancerequirements](/photos/41/52/415285/sot361-1_3d_sml.gif)
P89LPC930_931
Manufacturer Part Number
P89LPC930_931
Description
The P89LPC930/931 are single-chip microcontrollers designed for applicationsdemanding high-integration, low cost solutions over a wide range of performancerequirements
Manufacturer
NXP Semiconductors
Datasheet
1.P89LPC930_931.pdf
(55 pages)
Philips Semiconductors
Table 3:
9397 750 14472
Product data
Symbol
P1.0 - P1.7
Pin description
Pin
18, 17, 12,
11, 10, 6,
5, 4
18
17
12
11
10
6
5
4
…continued
Type
I/O, I
I/O
O
I/O
I
I/O
I/O
I/O
I
I
I/O
I
I
I
I
I/O
I/O
[1]
Description
Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type, except for
three pins as noted below. During reset Port 1 latches are configured in the input only
mode with the internal pull-up disabled. The operation of the configurable Port 1 pins
as inputs and outputs depends upon the port configuration selected. Each of the
configurable port pins are programmed independently. Refer to
configurations”
open drain when used as outputs. P1.5 is input only.
All pins have Schmitt triggered inputs.
Port 1 also provides various special functions as described below:
P1.0 — Port 1 bit 0.
TxD — Transmitter output for the serial port.
P1.1 — Port 1 bit 1.
RXD — Receiver input for the serial port.
P1.2 — Port 1 bit 2 (open-drain when used as output).
T0 — Timer/counter 0 external count input or overflow output (open-drain when used
as output).
SCL — I
P1.3 — Port 1 bit 3 (open-drain when used as output).
INT0 — External interrupt 0 input.
SDA — I
P1.4 — Port 1 bit 4.
INT1 — External interrupt 1 input.
P1.5 — Port 1 bit 5 (input only).
RST — External Reset input during Power-on or if selected via UCFG1. When
functioning as a reset input a LOW on this pin resets the microcontroller, causing I/O
ports and peripherals to take on their default states, and the processor begins
execution at address 0. Also used during a power-on sequence to force In-System
Programming mode. When using an oscillator frequency above 12 MHz, the
reset input function of P1.5 must be enabled. An external circuit is required to
hold the device in reset at power-up until V
When system power is removed V
operating voltage. When using an oscillator frequency above 12 MHz, in some
applications, an external brownout detect circuit may be required to hold the
device in reset when V
P1.6 — Port 1 bit 6.
P1.7 — Port 1 bit 7.
2
2
Rev. 05 — 15 December 2004
C serial clock input/output.
C serial data input/output.
and
Table 7 “DC electrical characteristics”
DD
falls below the minimum specified operating voltage.
8-bit microcontrollers with two-clock 80C51 core
DD
will fall below the minimum specified
DD
P89LPC930/931
has reached its specified level.
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
for details. P1.2 - P1.3 are
Section 8.11.1 “Port
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