P89LPC9381 NXP Semiconductors, P89LPC9381 Datasheet
P89LPC9381
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P89LPC9381 Summary of contents
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... The P89LPC9381 is a single-chip microcontroller, available in low-cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC9381 in order to reduce component count, board space, and system cost. 2. Features 2 ...
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... I Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns minimum ramp times. I Only power and ground connections are required to operate the P89LPC9381 when internal reset option is selected. I Four interrupt priority levels. I Eight keypad interrupt inputs, plus two additional external interrupt inputs. ...
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... Ordering options Flash memory 4 kB Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC Temperature range Frequency + MHz to 18 MHz © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ...
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... DATA RAM PORT 3 PORT 2 PORT 1 PORT 0 KEYPAD INTERRUPT CPU clock ON-CHIP RC OSCILLATOR OSCILLATOR Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC TXD UART RXD SCL 2 I C-BUS SDA SPICLK MOSI SPI MISO SS REAL-TIME CLOCK/ SYSTEM TIMER ...
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... Philips Semiconductors 5. Functional diagram KBI0 AD05 KBI1 AD00 KBI2 AD01 KBI3 AD02 KBI4 AD03 KBI5 KBI6 KBI7 CLKOUT Fig 2. P89LPC9381 functional diagram P89LPC9381_1 Product data sheet CMP2 CIN2B CIN2A CIN1B PORT 0 CIN1A CMPREF CMP1 T1 P89LPC9381 XTAL2 PORT 3 XTAL1 002aac461 Rev. 01 — 8 September 2006 ...
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... I AD00 — ADC0 channel 0 analog input. Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC 28 P2[7] 27 P2[6] 26 P0[1]/CIN2B/KBI1/AD00 25 P0[2]/CIN2A/KBI2/AD01 24 P0[3]/CIN1B/KBI3/AD02 23 P0[4]/CIN1A/KBI4/AD03 22 P0[5]/CMPREF/KBI5 P89LPC9381 P0[6]/CMP1/KBI6 19 P0[7]/T1/KBI7 18 P1[0]/TXD 17 P1[1]/RXD 16 P2[5]/SPICLK 15 P2[4]/SS 002aac462 and Table 10 “Static characteristics” © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ...
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... INT0 — External interrupt 0 input. 2 I/O SDA — I C-bus serial data input/output. I P1[4] — Port 1 bit 4. I INT1 — External interrupt 1 input. Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC and Table 10 “Static characteristics” © Koninklijke Philips Electronics N.V. 2006. All rights reserved. for ...
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... SPICLK — SPI clock. When configured as master, this pin is output; when configured as slave, this pin is input. I/O P2[6] — Port 2 bit 6. I/O P2[7] — Port 2 bit 7. Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC has reached its specified DD will fall below the minimum DD falls below the minimum ...
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... V reference. I power supply: This is the power supply voltage for normal operation as well as Idle and Power-down modes. Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC and Table 10 “Static characteristics” © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ...
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... Philips Semiconductors 7. Functional description Remark: Please refer to the P89LPC9381 User’s Manual for a more detailed functional description. 7.1 Special function registers Remark: SFR accesses are restricted in the following ways: • User must not attempt to access any SFR locations not defined. • Accesses to any defined SFR locations must be strictly for the functions for the SFRs. ...
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... Table 4. P89LPC9381 Special function registers * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. Bit address ACC* Accumulator E0H AD0CON ADC0 control register 97H AD0INS ADC0 input select A3H AD0MODA ADC0 mode register A C0H AD0MODB ADC0 mode register B ...
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... Table 4. P89LPC9381 Special function registers * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. FMCON Program flash control E4H (Read) Program flash control E4H (Write) FMDATA Program flash data E5H 2 I2ADR I C slave address register DBH I2ADR ...
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... Table 4. P89LPC9381 Special function registers * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. IP0H Interrupt priority 0 high B7H Bit address IP1* Interrupt priority 1 F8H IP1H Interrupt priority 1 high F7H IP2 Interrupt priority 2 D6H IP2H Interrupt priority 2 high ...
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... Table 4. P89LPC9381 Special function registers * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. PCON Power control register 87H SMOD1 PCONA Power control register A B5H RTCPD Bit address PSW* Program status word D0H PT0AD Port 0 digital input disable ...
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... All ports are in input only (high-impedance) state after power-up. [3] The RSTSRC register reflects the cause of the P89LPC9381 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset value is xx11 0000. [4] The only reset source that affects these SFRs is power-on reset. ...
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... Table 5. P89LPC9381 extended special function registers Name Description ADC0HBND ADC0 high _boundary register, left (MSB) ADC0LBND ADC0 low_boundary register (MSB) AD0DAT0R ADC0 data register 0, right (LSB) AD0DAT0L ADC0 data register 0, left (MSB) AD0DAT1R ADC0 data register 1, right (LSB) AD0DAT1L ADC0 data register 1, left (MSB) ...
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... Philips Semiconductors 7.2 Enhanced CPU The P89LPC9381 uses an enhanced 80C51 CPU which runs at six times the speed of standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and most instructions execute in one or two machine cycles. 7.3 Clocks 7.3.1 Clock definitions The P89LPC9381 device has several internal clocks as defined below: OSCCLK — ...
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... Idle mode, it may be turned off prior to entering Idle, saving additional power. 7.4 On-chip RC oscillator option The P89LPC9381 has a 6-bit TRIM register that can be used to tune the frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory pre-programmed value to adjust the oscillator frequency to 7.373 MHz End-user applications can write to the TRIM register to adjust the on-chip RC oscillator to other frequencies ...
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... Low power select The P89LPC9381 is designed to run at 12 MHz (CCLK) maximum. However, if CCLK is 8 MHz or slower, the CLKLP SFR bit (AUXR1.7) can be set to ‘1’ to lower the power consumption further. On any reset, CLKLP is ‘0’ allowing highest performance access. ...
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... LOW in the next cycle, the interrupt request flag IEn in TCON is set, causing an interrupt request external interrupt is enabled when the P89LPC9381 is put into Power-down or Idle mode, the interrupt will cause the processor to wake-up and resume operation. Refer to Section 7.15 “Power reduction modes” ...
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... EC EA (IE0.7) TF0 ET0 TF1 ET1 TI & RI/RI ES/ESR TI EST SI EI2C SPIF ESPI ADCI0 ENBI1 BNDI1 EADC Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC wake-up (if in power-down) interrupt to CPU 002aac464 © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... Philips Semiconductors 7.13 I/O ports The P89LPC9381 has four I/O ports: Port 0, Port 1, Port 2, and Port 3. Ports 0, 1 and 2 are 8-bit ports, and Port 2-bit port. The exact number of I/O pins available depends upon the clock and reset options chosen, as shown in Table 7. Number of I/O pins available ...
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... Pin P1[5] is input only. Pins P1[2] and P1[3] and are configurable for either input-only or open-drain. Every output on the P89LPC9381 has been designed to sink typical LED drive current. However, there is a maximum total output current for all ports which must not be exceeded. Please refer to All ports pins that can function as an output have slew rate controlled outputs to limit noise generated by quickly switching output signals ...
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... RTC running during power-down. P89LPC9381_1 Product data sheet (see Table 10 “Static the P89LPC9381 device is to operate with a power supply that can be bo Table 10 “Static characteristics” has been lowered Rev. 01 — 8 September 2006 ...
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... For any other reset, previously set flag bits that have not been cleared will remain set. 7.16.1 Reset vector Following reset, the P89LPC9381 will fetch instructions from either address 0000H or the Boot address. The Boot address is formed by using the Boot Vector as the high byte of the address and the low byte of the address = 00H ...
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... RTC/system timer The P89LPC9381 has a simple RTC that allows a user to continue running an accurate timer while the rest of the device is powered-down. The RTC can be a wake- interrupt source. The RTC is a 23-bit down counter comprised of a 7-bit prescaler and a 16-bit loadable down counter. When it reaches all ‘ ...
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... Section 7.19.5 “Baud rate generator and 7.19.5 Baud rate generator and selection The P89LPC9381 enhanced UART has an independent Baud Rate Generator. The baud rate is determined by a baud-rate preprogrammed into the BRGR1 and BRGR0 SFRs which together form a 16-bit baud rate divisor value that works in a similar manner as Timer 1 but is much more accurate ...
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... If double buffering is enabled, TB8 must be updated before SBUF is written, as TB8 will be double-buffered together with SBUF data. P89LPC9381_1 Product data sheet bit (bit 8) in double buffering (modes 1, 2 and 3) Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... C-bus interface that supports data transfers up to 400 kHz C-bus P1[3]/SDA P1[2]/SCL MCU 2 C-bus configuration Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC Figure 7. The P89LPC9381 device provides OTHER DEVICE OTHER DEVICE 2 2 WITH I C-BUS WITH I C-BUS INTERFACE INTERFACE 002aac550 © ...
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... FILTER OUTPUT STAGE timer 1 overflow P1[2] I2CON I2SCLH I2SCLL status bus I2STAT 2 C-bus serial interface block diagram Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC 8 I2ADR ADDRESS REGISTER COMPARATOR SHIFT REGISTER ACK I2DAT 8 BIT COUNTER / ARBITRATION CCLK TIMING AND SYNC LOGIC ...
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... Philips Semiconductors 7.21 SPI The P89LPC9381 provides another high-speed serial communication interface—the SPI interface. SPI is a full-duplex, high-speed, synchronous communication bus with two operation modes: Master mode and Slave mode Mbit/s can be supported in either Master or Slave mode. It has a Transfer Completion Flag and Write Collision Flag Protection ...
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... REGISTER SPICLK SPI CLOCK PORT GENERATOR master MISO 8-BIT SHIFT MOSI REGISTER SPICLK SPI CLOCK SS GENERATOR Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC slave MISO 8-BIT SHIFT MOSI REGISTER SPICLK SS 002aaa901 slave MISO 8-BIT SHIFT MOSI REGISTER SPICLK ...
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... Fig 12. SPI single master multiple slaves configuration P89LPC9381_1 Product data sheet master MISO 8-BIT SHIFT MOSI REGISTER SPICLK SPI CLOCK port GENERATOR port Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC slave MISO 8-BIT SHIFT MOSI REGISTER SPICLK SS slave MISO 8-BIT SHIFT MOSI REGISTER ...
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... Philips Semiconductors 7.22 Analog comparators Two analog comparators are provided on the P89LPC9381. Input and output options allow use of the comparators in a number of different configurations. Comparator operation is such that the output is a logical one (which may be read in a register and/or routed to a pin) when the positive input (one of two selectable pins) is greater than the negative input (selectable from a pin or an internal reference voltage). Otherwise the output is a zero. Each comparator may be confi ...
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... In order to set the flag and cause an interrupt, the pattern on Port 0 must be held longer than six CCLKs. P89LPC9381_1 Product data sheet 8-bit microcontroller with 10-bit ADC Rev. 01 — 8 September 2006 P89LPC9381 © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... Feeding the watchdog requires a two-byte sequence. If PCLK is selected as the watchdog clock and the CPU is powered-down, the watchdog is disabled. The watchdog timer has a time-out period that ranges from a few few seconds. Please refer to the P89LPC9381 User’s Manual for more details. MOV WFEED1, #0A5H MOV WFEED2, #05AH ...
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... Flash organization The program memory consists of four 1 kB sectors on the P89LPC9381 devices. Each sector can be further divided into 64 B pages. In addition to sector erase, page erase, and byte erase page register is included which allows from given page to be programmed at the same time, substantially reducing overall programming time. 7.26.4 Using fl ...
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... The In-System Programming facility consists of a series of internal hardware resources coupled with internal firmware to facilitate remote programming of the P89LPC9381 through the serial port. This firmware is provided by Philips and embedded within each P89LPC9381 device. The Philips In-System Programming facility has made in-system programming in an embedded application possible with a minimum of additional expense in components and circuit board area. The ISP function uses fi ...
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... UCFG1. Please see the P89LPC9381 User’s Manual for additional details. 7.28 User sector security bytes There are four User Sector Security Bytes on the P89LPC9381. Each byte corresponds to one sector. Please see the P89LPC9381 User’s Manual for additional details. 8. ADC 8 ...
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... Power-down mode 8.3 Block diagram Fig 15. ADC block diagram P89LPC9381_1 Product data sheet comp + INPUT MUX – Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC SAR CONTROL LOGIC 8 DAC0 CCLK 002aab103 © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... AD0DAT3R and AD0DAT3L, etc. An interrupt is generated, if enabled, after every set of four or eight conversions (user selectable). P89LPC9381_1 Product data sheet 8-bit microcontroller with 10-bit ADC Rev. 01 — 8 September 2006 P89LPC9381 © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... Power-down mode or Total Power-down mode, the ADC does not function. If the ADC is enabled, it will consume power. Power can be reduced by disabling the ADC. P89LPC9381_1 Product data sheet 8-bit microcontroller with 10-bit ADC Rev. 01 — 8 September 2006 P89LPC9381 © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to V otherwise noted. P89LPC9381_1 Product data sheet 8-bit microcontroller with 10-bit ADC [1] Conditions except V , with respect transfer, not device power consumption Rev. 01 — 8 September 2006 P89LPC9381 Min Max Unit 55 +125 C 65 +150 ...
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... XTAL1, XTAL2 pins; with respect except XTAL1, XTAL2 with respect [ th(HL) [ Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC [1] Min Typ Max - 0 1 0.22V ...
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... Product data sheet …continued Conditions 2.4 V < V < 3.6 V; with DD BOV = 1, BOPD = 0 specifications are measured using an external clock with the following functions disabled: comparators, for steady state (non-transient) limits on I Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC [1] Min Typ Max 2. ...
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... Figure 16 - see Figure 16 - see Figure 16 150 0 - see Figure 18, 19, 20 and 21 6 CCLK 4 CCLK see Figure 20 and 21 250 Rev. 01 — 8 September 2006 P89LPC9381 MHz osc Max Min Max 7.557 7.189 7.557 MHz 520 320 520 125 ...
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... Figure 20 and 21 0 see Figure 18, 19, 20 and see Figure 18, 0 19, 20 and 21 see Figure 18, 19, 20 and see Figure 18, 19, 20 and Rev. 01 — 8 September 2006 P89LPC9381 MHz Unit osc Max Min Max - 250 - ns - 165 - ns - 250 - ns - 165 - ns - 250 - ns - 100 - ns - 100 - ns 120 0 120 ns ...
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... Figure 16 - see Figure 16 150 0 - see Figure 18, 19, 20 CCLK 4 CCLK see Figure 20, 21 250 see Figure 20, 21 250 Rev. 01 — 8 September 2006 P89LPC9381 MHz Unit osc Max Min Max 7.557 7.189 7.557 MHz 520 320 520 ...
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... Figure 18, 19, 20 and see Figure 18, 0 19, 20 and 21 see Figure 18, 19, 20 and see Figure 18, 19, 20 and Rev. 01 — 8 September 2006 P89LPC9381 MHz Unit osc Max Min Max - 111 - ns - 167 - ns - 111 - ns - 167 - ns - 100 - ns - 100 - 160 - 160 ns 160 ...
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... SPICLKL t SPICLKH t t SPIF SPIR t SPICLKL t SPICLKH t t SPIDSU SPIDH MSB/LSB SPIDV SPIOH master MSB/LSB out Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC set TI valid valid valid valid set RI 002aaa906 t CHCX t CLCH T cy(clk) 002aaa907 t SPIR ...
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... SPIR t SPICLKL t SPICLKH t t SPIOH SPIOH t t SPIDV SPIDV slave MSB/LSB out t t SPIDH SPIDSU MSB/LSB in Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC t SPIR LSB/MSB SPIDV SPIDV t SPIR master LSB/MSB out 002aaa909 t SPIR t SPILAG t t SPIOH SPIDIS ...
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... SPIDV SPIDV slave MSB/LSB out SPIDSU SPIDH SPIDSU MSB/LSB in Conditions RST t RL Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC t SPIR t SPILAG t SPIDIS slave LSB/MSB out t t SPIDSU SPIDH LSB/MSB in 002aaa911 Min Typ Max ...
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... LI [1] This parameter is characterized, but not tested in production. P89LPC9381_1 Product data sheet 8-bit microcontroller with 10-bit ADC Conditions Min - 0 [ < V < Rev. 01 — 8 September 2006 P89LPC9381 Typ Max Unit - 0 250 500 ...
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... ADC clock cycle time cy(ADC) t ADC conversion time ADC P89LPC9381_1 Product data sheet 8-bit microcontroller with 10-bit ADC Conditions Min kHz to 100 kHz - - 111 ADC enabled - Rev. 01 — 8 September 2006 P89LPC9381 Typ Max Unit 0 0 LSB - 1 LSB - 2 LSB - 1 LSB - 2 ...
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... Product data sheet 2.5 scale (1) ( 0.30 0.2 9.8 4.5 0.65 0.19 0.1 9.6 4.3 REFERENCES JEDEC JEITA MO-153 Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC detail 6.6 0.75 0.4 1 0.2 0.13 6.2 0.50 0.3 EUROPEAN PROJECTION © ...
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... Phase-Locked Loop Pulse Width Modulator Random Access Memory Resistance-Capacitance Real-Time Clock Successive Approximation Register Special Function Register Serial Peripheral Interface Universal Asynchronous Receiver/Transmitter Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... Revision history Table 17. Revision history Document ID Release date P89LPC9381_1 20060908 P89LPC9381_1 Product data sheet Data sheet status Change notice Product data sheet - Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC Supersedes - © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of Koninklijke Philips Electronics N.V. Rev. 01 — 8 September 2006 P89LPC9381 8-bit microcontroller with 10-bit ADC © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... ICP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 7.26.7 IAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 7.26.8 ISP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 7.26.9 Power-on reset code execution . . . . . . . . . . . 39 7.26.10 Hardware activation of the bootloader . . . . . . 39 7.27 User configuration bytes 7.28 User sector security bytes . . . . . . . . . . . . . . . 39 8 ADC Rev. 01 — 8 September 2006 P89LPC9381 bit (bit 8) in double buffering continued >> © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © Koninklijke Philips Electronics N.V. 2006. For more information, please visit: http://www.semiconductors.philips.com. For sales office addresses, email to: sales.addresses@www.semiconductors.philips.com. All rights reserved. Date of release: 8 September 2006 Document identifier: P89LPC9381_1 ...