PSMN9R0-30YL NXP Semiconductors, PSMN9R0-30YL Datasheet - Page 7

Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology

PSMN9R0-30YL

Manufacturer Part Number
PSMN9R0-30YL
Description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
PSMN9R0-30YL
Product data sheet
Fig 9.
Fig 11. Sub-threshold drain current as a function of
(pF)
1800
1600
1400
1200
1000
10
10
10
10
10
10
C
(A)
800
I
D
-1
-2
-3
-4
-5
-6
function of gate-source voltage; typical values
gate-source voltage
Input and reverse transfer capacitances as a
2
0
4
min
1
6
C
C
iss
rss
typ
2
8
V
All information provided in this document is subject to legal disclaimers.
V
GS
003aab271
003aac542
GS
max
(V)
(V)
10
3
Rev. 04 — 9 March 2011
N-channel 30 V 8 mΩ logic level MOSFET in LFPAK
Fig 10. Drain-source on-state resistance as a function
Fig 12. Gate-source threshold voltage as a function of
V
R
(mΩ)
GS (th)
(V)
DSon
12
10
8
6
3
2
1
0
-60
of gate-source voltage; typical values
junction temperature
2
4
0
PSMN9R0-30YL
max
typ
min
60
6
120
8
© NXP B.V. 2011. All rights reserved.
V
003aac537
003a a c337
T
GS
j
(°C)
(V)
180
10
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