psmn9r0-30kl NXP Semiconductors, psmn9r0-30kl Datasheet

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psmn9r0-30kl

Manufacturer Part Number
psmn9r0-30kl
Description
N-channel 30 V 9 M Logic-level Mosfet In So8
Manufacturer
NXP Semiconductors
Datasheet
1. Product profile
1.1 General description
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
Logic level N-channel enhancement mode MOSFET in SO8 package qualified to 150 °C.
This product is designed and qualified for use in a wide range of industrial,
communications and power supply equipment
Table 1.
Symbol
V
I
P
T
Static characteristics
R
D
j
DS
tot
DSon
PSMN9R0-30KL
N-channel 30 V 9 mΩ logic-level MOSFET in SO8
Rev. 01 — 14 April 2011
High efficiency due to low switching
and conduction losses
High performance replacement for
legacy SO8 designs
DC-to-DC converters
Li-ion battery applications
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
junction temperature
drain-source on-state
resistance
Conditions
T
T
see
T
V
T
V
T
j
mb
mb
j
j
GS
GS
≥ 25 °C; T
= 25 °C; see
= 25 °C; see
Figure 1
= 25 °C; V
= 25 °C; see
= 4.5 V; I
= 10 V; I
j
D
≤ 150 °C
D
Suitable for logic level gate drive
Suitable for wave and reflow soldering
Load switching
Portable equipment
GS
= 5 A;
= 5 A;
Figure 12
Figure 12
Figure 2
= 10 V;
Objective data sheet
Min
-
-
-
-55
-
-
Typ
-
-
-
-
11.1
7.7
Max Unit
30
16
4
150
13
9
V
A
W
°C
mΩ
mΩ

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psmn9r0-30kl Summary of contents

Page 1

... PSMN9R0-30KL N-channel mΩ logic-level MOSFET in SO8 Rev. 01 — 14 April 2011 1. Product profile 1.1 General description Logic level N-channel enhancement mode MOSFET in SO8 package qualified to 150 °C. This product is designed and qualified for use in a wide range of industrial, communications and power supply equipment 1 ...

Page 2

... unclamped; R Simplified outline 8 1 SOT96-1 (SO8) Description plastic small outline package; 8 leads; body width 3.9 mm All information provided in this document is subject to legal disclaimers. Rev. 01 — 14 April 2011 PSMN9R0-30KL Min = see Figure 14; - Figure ...

Page 3

... P der (%) 150 200 ( ° Fig 2. Normalized total power dissipation as a function of solder point temperature All information provided in this document is subject to legal disclaimers. Rev. 01 — 14 April 2011 PSMN9R0-30KL Min - = 20 kΩ -20 Figure 1 - Figure ° -55 - ° ...

Page 4

... Safe operating area; continuous and peak drain currents as a function of drain-source voltage PSMN9R0-30KL Objective data sheet D 1 All information provided in this document is subject to legal disclaimers. Rev. 01 — 14 April 2011 PSMN9R0-30KL N-channel mΩ logic-level MOSFET in SO8 =10 μ 100 μ ...

Page 5

... Transient thermal impedance from junction to mounting base as a function of pulse duration; typical values PSMN9R0-30KL Objective data sheet N-channel mΩ logic-level MOSFET in SO8 Conditions see Figure All information provided in this document is subject to legal disclaimers. Rev. 01 — 14 April 2011 PSMN9R0-30KL Min Typ - 24 003aaf981 © ...

Page 6

... Figure see Figure D DS see Figure MHz °C; see Figure 16 j All information provided in this document is subject to legal disclaimers. Rev. 01 — 14 April 2011 PSMN9R0-30KL Min Typ Max = -55 ° ° 1.3 1.7 2. 2.55 0.5 - ...

Page 7

... GS DS 003aaf982 (A) 2 2.6 5 2.4 V ( (V) DS Fig 6. function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 01 — 14 April 2011 PSMN9R0-30KL Min Typ = 0. ° 150 ° ...

Page 8

... V (V) GS Fig 10. Sub-threshold drain current as a function of gate-source voltage All information provided in this document is subject to legal disclaimers. Rev. 01 — 14 April 2011 PSMN9R0-30KL 003aaf985 MHz DS 003aab271 min typ © NXP B.V. 2011. All rights reserved. ...

Page 9

... T Fig 12. Drain-source on-state resistance as a function of drain current; typical values 003aaf978 120 180 ( ° Fig 14. Gate charge waveform definitions All information provided in this document is subject to legal disclaimers. Rev. 01 — 14 April 2011 PSMN9R0-30KL 003aaf987 V (V) = 2.8 GS 3.5 4.0 4.5 10 25°C ...

Page 10

... Fig 16. Input, output and reverse transfer capacitances ( 150 ° 0.2 0.4 0.6 All information provided in this document is subject to legal disclaimers. Rev. 01 — 14 April 2011 PSMN9R0-30KL (pF MHz function of drain-source voltage; typical ...

Page 11

... REFERENCES JEDEC JEITA MS-012 All information provided in this document is subject to legal disclaimers. Rev. 01 — 14 April 2011 PSMN9R0-30KL N-channel mΩ logic-level MOSFET in SO8 θ detail ...

Page 12

... NXP Semiconductors 8. Revision history Table 7. Revision history Document ID Release date PSMN9R0-30KL v.1 20110414 PSMN9R0-30KL Objective data sheet N-channel mΩ logic-level MOSFET in SO8 Data sheet status Change notice Objective data sheet - All information provided in this document is subject to legal disclaimers. Rev. 01 — 14 April 2011 ...

Page 13

... In case an individual agreement is concluded only the terms and conditions of the respective All information provided in this document is subject to legal disclaimers. Rev. 01 — 14 April 2011 PSMN9R0-30KL © NXP B.V. 2011. All rights reserved ...

Page 14

... TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 01 — 14 April 2011 PSMN9R0-30KL Trademarks © NXP B.V. 2011. All rights reserved ...

Page 15

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 14 April 2011 Document identifier: PSMN9R0-30KL ...

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