EP4SE820H40C4N Altera Corporation, EP4SE820H40C4N Datasheet - Page 75

• Manufacturer Part Number: EP4SE820H40C4N
• Description: IC STRATIX IV FPGA 820K 1517HBGA
• Manufacturer: Altera Corporation
• Series: STRATIX® IV Er

Specifications of EP4SE820H40C4N

• Number Of Logic Elements/cells: 813050
• Number Of Labs/clbs: 32522
• Total Ram Bits: 34093056
• Number Of I /o: 976
• Number Of Gates: -
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1517-BBGA Exposed Pad
• Lead Free Status: Lead free
• Rohs Status: RoHS Compliant

Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Glossary
Table 1–54. Document Revision History (Part 2 of 3)
December 2011 Altera Corporation
February 2011
November 2010
September 2010
July 2010
March 2010
February 2010
November 2009
June 2009
Date
Version
4.6
4.5
4.2
4.1
4.0
4.4
4.3
3.1
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Updated Table 1–1, Table 1–5, Table 1–23, Table 1–24, Table 1–30, Table 1–31, Table
1–32, Table 1–34, Table 1–37, Table 1–41, and Table 1–51.
Updated the “Recommended Operating Conditions” section.
Added the “Schmitt Trigger Input” section.December
Minor text edits.
Updated Table 1–29.
Updated chapter title.
Minor text edits.
Applied new template.
Updated Table 1–1 and Table 1–5.
Updated Table 1–7, Table 1–22, Table 1–23, Table 1–33, Table 1–35, Table 1–36, and
Table 1–40.
Added Table 1–39.
Changed “PCI Express” to “PCIe” throughout.
Minor text edits
Updated Table 1–22, Table 1–23, Table 1–30, Table 1–46, and Table 1–49.
Added Table 1–31.
Minor text edits.
Updated Table 1–11, Table 1–22, Table 1–23, Table 1–24, Table 1–25, Table 1–26,
Table 1–27, Table 1–29, Table 1–32, Table 1–33, Table 1–34, Table 1–35, Table 1–39,
Table 1–40, Table 1–43, Table 1–46, and Table 1–49.
Added Stratix IV GT speed grade note to Table 1–32, Table 1–35, Table 1–39, Table 1–43,
Table 1–44, Table 1–45, and Table 1–46.
Added Table 1–28 and Table 1–30.
Minor text edits.
Added Table 1–9, Table 1–15, Table 1–38, and Table 1–39.
Added Figure 1–5 and Figure 1–6.
Added the “Transceiver Datapath PCS Latency” section.
Updated the “Electrical Characteristics”, “Operating Conditions”, and “I/O Timing”
sections.
All tables updated except Table 1–16, Table 1–24, Table 1–25, Table 1–26, Table 1–27,
Table 1–33, Table 1–34, and Table 1–45.
Updated Figure 1–2 and Figure 1–3.
Updated Equation 1–1.
Deleted Table 1-28, Table 1-29, Table 1-30, Table 1-42, Table 1-43, and Table 1-44.
Minor text edits.
Added “Preliminary Specifications” to the footer of each page.
Updated Table 1–1, Table 1–2, Table 1–7, Table 1–10, Table 1–11, Table 1–12,
Table 1–21, Table 1–22, Table 1–23, Table 1–25, Table 1–37, Table 1–38, Table 1–39,
Table 1–40, and Table 1–44.
Minor text edits.
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
Changes
1–67