STM32F415ZG STMicroelectronics, STM32F415ZG Datasheet - Page 131
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STM32F415ZG
Manufacturer Part Number
STM32F415ZG
Description
High-performance and DSP with FPU, ARM Cortex-M4 MCU with 1 Mbyte Flash, 168 MHz CPU, Art Accelerator, HW crypto
Manufacturer
STMicroelectronics
Datasheet
1.STM32F415ZG.pdf
(168 pages)
Specifications of STM32F415ZG
Core
ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
3×12-bit, 2.4 Msps A/d Converters
up to 24 channels and 7.2 MSPS in triple interleaved mode
General-purpose Dma
16-stream DMA controller with FIFOs and burst support
Up To 17 Timers
up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
Cryptographic Acceleration
hardware acceleration for AES 128, 192, 256, Triple DES, HASH (MD5, SHA-1), and HMAC
Rtc
subsecond accuracy, hardware calendar
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F415ZGT6
Manufacturer:
VISHAY
Quantity:
5 000
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STM32F415xx, STM32F417xx
Figure 55. Asynchronous multiplexed PSRAM/NOR write waveforms
Table 74.
1. C
2. Based on characterization, not tested in production.
t
t
t
t
v(Data_NADV)
t
h(Data_NWE)
t
t
h(AD_NADV)
v(NADV_NE)
v(NWE_NE)
h(NE_NWE)
t
h(BL_NWE)
t
Symbol
t
h(A_NWE)
t
t
v(BL_NE)
w(NADV)
L
w(NWE)
v(A_NE)
t
w(NE)
= 30 pF.
FSMC_NBL[1:0]
FSMC_ AD[15:0]
FSMC_A[25:16]
FSMC_NADV
FSMC_NWE
FSMC_NOE
FSMC_NEx
Asynchronous multiplexed PSRAM/NOR write timings
FSMC_NE low time
FSMC_NEx low to FSMC_NWE low
FSMC_NWE low tim e
FSMC_NWE high to FSMC_NE high hold time
FSMC_NEx low to FSMC_A valid
FSMC_NEx low to FSMC_NADV low
FSMC_NADV low time
FSMC_AD(adress) valid hold time after
FSMC_NADV high)
Address hold time after FSMC_NWE high
FSMC_BL hold time after FSMC_NWE high
FSMC_NEx low to FSMC_BL valid
FSMC_NADV high to Data valid
Data hold time after FSMC_NWE high
Doc ID 022063 Rev 2
Parameter
t
v(NADV_NE)
t
t
t
v(A_NE)
v(A_NE)
t
t
v(NWE_NE)
v(BL_NE)
w(NADV)
Address
Address
t
t
t
v(Data_NADV)
w(NE)
h(AD_NADV)
NBL
t
w(NWE)
t
h(BL_NWE)
t
h(A_NWE)
Data
2T
4T
T
T
T
T
HCLK
HCLK
T
HCLK
HCLK
HCLK
T
T
HCLK
Min
HCLK
HCLK
HCLK
1
-
-
-
Electrical characteristics
–0.5
– 2
–0.5
–2
–2
–0.5
(1)(2)
t
T
h(Data_NWE)
2T
T
4T
T
t
HCLK
h(NE_NWE)
HCLK
HCLK
HCLK
Max
HCLK
1.5
0
2
-
-
-
-
-
–0.5
-0.5
+ 1
+3
+3
ai14891B
131/168
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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