STM32F415ZG STMicroelectronics, STM32F415ZG Datasheet - Page 48
![no-image](/images/manufacturer_photos/0/6/637/stmicroelectronics_sml.jpg)
STM32F415ZG
Manufacturer Part Number
STM32F415ZG
Description
High-performance and DSP with FPU, ARM Cortex-M4 MCU with 1 Mbyte Flash, 168 MHz CPU, Art Accelerator, HW crypto
Manufacturer
STMicroelectronics
Datasheet
1.STM32F415ZG.pdf
(168 pages)
Specifications of STM32F415ZG
Core
ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
3×12-bit, 2.4 Msps A/d Converters
up to 24 channels and 7.2 MSPS in triple interleaved mode
General-purpose Dma
16-stream DMA controller with FIFOs and burst support
Up To 17 Timers
up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
Cryptographic Acceleration
hardware acceleration for AES 128, 192, 256, Triple DES, HASH (MD5, SHA-1), and HMAC
Rtc
subsecond accuracy, hardware calendar
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F415ZGT6
Manufacturer:
VISHAY
Quantity:
5 000
- Current page: 48 of 168
- Download datasheet (3Mb)
Pinouts and pin description
Table 6.
48/168
23 32 43
24 33 44
25 34 45
26 35 46
27 36 47
28 37 48
-
-
-
-
-
-
-
-
-
-
-
-
-
38 58
39 59
40 60
Pin number
-
-
-
-
-
-
-
-
-
-
49
50
51
52
53
54
55
56
57
61
STM32F41x pin and ball definitions (continued)
R3
N5
R5
R4
M6
R6
M8
N8
N7
M7
R8
M9
P5
P6
N6
R7
P7
P8
P9
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
(function after
PB2-BOOT1
Pin name
reset)
(PB2)
PF11
PF12
PF13
PF14
PF15
PC4
PC5
PG0
PG1
PB0
PB1
V
PE7
PE8
PE9
PA7
V
V
SS
DD
SS
(1)
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
S
S
S
Doc ID 022063 Rev 2
(4)
(4)
(4)
(4)
(4)
SPI1_MOSI/ TIM8_CH1N /
TIM3_CH3 / TIM8_CH2N/
TIM1_CH2N/ EVENTOUT
TIM3_CH4 / TIM8_CH3N/
TIM1_CH3N/ EVENTOUT
FSMC_A10/ EVENTOUT
FSMC_A11/ EVENTOUT
FSMC_D5/ TIM1_CH1N/
TIM14_CH1/TIM3_CH2/
FSMC_A6/ EVENTOUT
FSMC_A7/ EVENTOUT
FSMC_A8/ EVENTOUT
FSMC_A9/ EVENTOUT
DCMI_12/ EVENTOUT
FSMC_D4/TIM1_ETR/
FSMC_D6/TIM1_CH1/
Alternate functions
ETH_RMII_RX_D0 /
ETH_RMII_RX_D1 /
OTG_HS_ULPI_D1/
OTG_HS_ULPI_D2/
ETH_MII_RX_DV /
ETH_MII_RX_D0/
ETH_MII_RX_D1/
ETH_MII_RXD2 /
ETH_MII_RXD3 /
OTG_HS_INTN /
RMII_CRS_DV/
TIM1_CH1N /
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
STM32F415xx, STM32F417xx
Additional functions
ADC12_IN14
ADC12_IN15
ADC12_IN7
ADC12_IN8
ADC12_IN9
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